Article

Packetized On-Chip Interconnect Communication Analysis for MPSoC

Authors:

Giovanni De MicheliAuthors Info & Claims

DATE '03: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

Page 10344

Published: 03 March 2003 Publication History

Abstract

Interconnect networks play a critical role in shared memory multi-processor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the packet dataflows that are transported on the network. In this paper, by introducing a packetized on-chip communication power model, we discuss the packetization impact on MPSoC performance and power consumption. Particularly, we propose a quantitative analysis method to evaluate the relationship between different design options (cache, memory, packetization scheme, etc.) at the architectural level. From the benchmark experiments, we show that optimal performance and power tradeoff can be achieved by the selection of appropriate packet sizes.

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Cited By

Mische JMellwig CStegmeier AFrieb MUngerer T(2017)Minimally buffered deflection routing with in-order delivery in a torusProceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip10.1145/3130218.3130227(1-8)Online publication date: 19-Oct-2017
https://dl.acm.org/doi/10.1145/3130218.3130227
Sepulveda JFernandes RMarcon CFlorez DSigl GSilveira J(2017)A security-aware routing implementation for dynamic data protection in zone-based MPSoCProceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands10.1145/3109984.3109996(59-64)Online publication date: 28-Aug-2017
https://dl.acm.org/doi/10.1145/3109984.3109996
Runge AKolla R(2016)Consideration of the Flit Size for Deflection Routing based Network-on-ChipsProceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems10.1145/2857058.2857060(1-6)Online publication date: 18-Jan-2016
https://dl.acm.org/doi/10.1145/2857058.2857060
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Index Terms

Packetized On-Chip Interconnect Communication Analysis for MPSoC
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures
2. Hardware
  1. Communication hardware, interfaces and storage
    1. Buses and high-speed links
  2. Very large scale integration design
    1. Application-specific VLSI designs
      1. Application specific processors

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cover image ACM Conferences

DATE '03: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

March 2003

1112 pages

ISBN:0769518702

Sponsors

SIGDA: ACM Special Interest Group on Design Automation

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IEEE Computer Society

United States

Publication History

Published: 03 March 2003

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DATE03: Design, Automation, and Test in Europe 2003

March 3 - 7, 2003

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

Mische JMellwig CStegmeier AFrieb MUngerer T(2017)Minimally buffered deflection routing with in-order delivery in a torusProceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip10.1145/3130218.3130227(1-8)Online publication date: 19-Oct-2017
https://dl.acm.org/doi/10.1145/3130218.3130227
Sepulveda JFernandes RMarcon CFlorez DSigl GSilveira J(2017)A security-aware routing implementation for dynamic data protection in zone-based MPSoCProceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands10.1145/3109984.3109996(59-64)Online publication date: 28-Aug-2017
https://dl.acm.org/doi/10.1145/3109984.3109996
Runge AKolla R(2016)Consideration of the Flit Size for Deflection Routing based Network-on-ChipsProceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems10.1145/2857058.2857060(1-6)Online publication date: 18-Jan-2016
https://dl.acm.org/doi/10.1145/2857058.2857060
Pang KFresse VYao S(2016)Communication-aware branch and bound with cluster-based latency-constraint mapping technique on network-on-chipThe Journal of Supercomputing10.1007/s11227-016-1732-972:6(2283-2309)Online publication date: 1-Jun-2016
https://dl.acm.org/doi/10.1007/s11227-016-1732-9
Runge AKolla R(2016)An Alternating Transmission Scheme for Deflection Routing Based Network-on-ChipsProceedings of the 29th International Conference on Architecture of Computing Systems -- ARCS 2016 - Volume 963710.1007/978-3-319-30695-7_4(48-59)Online publication date: 4-Apr-2016
https://dl.acm.org/doi/10.1007/978-3-319-30695-7_4
Das AKumar AVeeravalli B(2014)Communication and migration energy aware task mapping for reliable multiprocessor systemsFuture Generation Computer Systems10.5555/2747903.274819030:C(216-228)Online publication date: 1-Jan-2014
https://dl.acm.org/doi/10.5555/2747903.2748190
Das AKumar AVeeravalli BFettweis GNebel W(2014)Temperature aware energy-reliability trade-offs for mapping of throughput-constrained applications on multimedia MPSoCsProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2616732(1-6)Online publication date: 24-Mar-2014
https://dl.acm.org/doi/10.5555/2616606.2616732
Das AKumar AVeeravalli B(2014)Energy-aware task mapping and scheduling for reliable embedded computing systemsACM Transactions on Embedded Computing Systems10.1145/2544375.254439213:2s(1-27)Online publication date: 27-Jan-2014
https://dl.acm.org/doi/10.1145/2544375.2544392
Ferreira Rde Macedo Mourelle LNedjah N(2010)A parallel genetic algorithm on a multi-processor system-on-chipProceedings of the 23rd international conference on Industrial engineering and other applications of applied intelligent systems - Volume Part II10.5555/1945847.1945868(164-172)Online publication date: 1-Jun-2010
https://dl.acm.org/doi/10.5555/1945847.1945868
Papadopoulos LSoudris D(2007)System-level application-specific NoC design for network and multimedia applicationsProceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation10.5555/2391795.2391797(1-9)Online publication date: 3-Sep-2007
https://dl.acm.org/doi/10.5555/2391795.2391797
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