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Cell delay analysis based on rate-of-current change

Authors:

Shahin Nazarian,

Massoud PedramAuthors Info & Claims

DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings

Pages 539 - 544

Published: 06 March 2006 Publication History

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Abstract

A cell delay model based on rate-of-current-change is presented, which accounts for the impact of the shape of the noisy waveform on the output voltage waveform. More precisely, a pre-characterized table of time derivatives of the output current as a function of input voltage and output load values is constructed. The data in this table, in combination with the Taylor series expansion of the output current, is utilized to progressively compute the output current waveform, which is then integrated to produce the output voltage waveform. Experimental results show the effectiveness and efficiency of this new delay model.

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DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings

March 2006

1390 pages

ISBN:3981080106

General Chair:
Georges Gielen
KU Leuven, BE

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European Design and Automation Association

Leuven, Belgium

Publication History

Published: 06 March 2006

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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;

Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Statistical logic cell delay analysis using a current-based model

High slew rate current mode transconductance error amplifier for low quiescent current output-capacitorless CMOS LDO regulator

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Recommendations

Statistical logic cell delay analysis using a current-based model

High slew rate current mode transconductance error amplifier for low quiescent current output-capacitorless CMOS LDO regulator

Design of a three-stage ring-type voltage-controlled oscillator with a wide tuning range by controlling the current level in an embedded delay cell

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