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A symbolic approach for mixed-signal model checking

Published: 21 January 2008 Publication History

Abstract

In this paper we firstly introduce a novel symbolic model checker (MScheck) for mixed-signal circuits. MScheck is capable to conflate the continuous behavior, typical for analog designs, and the discrete behavior in the digital domain for formal verification. Timing information of both systems will be symbolically stored within multi terminal binary decision diagrams (MTBDDs) for the entire verification procedure. The effectiveness of our approach is demonstrated on a phase locked loop (PLL) by formal verification of the locking property1.

References

[1]
T. A. Henzinger, P.-H. Ho, and H. Wong-Toi, "HYTECH: A Model Checker for Hybrid Systems," International Journal on Software Tools for Technology Transfer, vol. 1, no. 1--2, pp. 110--122, 1997.
[2]
E. Asarin, T. Dang, and O. Maler, "d/dt: A Tool For Reachability Analysis Of Continuous And Hybrid Systems," in 5th IFAC Symposium Nonlinear Control Systems (NOLCOS'01), July 2001.
[3]
G. Frehse, "PHAVer: Algorithmic Verification of Hybrid Systems Past HyTech," Lecture Notes in Computer Science, vol. 3414, pp. 258--273, February 2005.
[4]
E. M. Clarke, O. Grumberg, and D. A. Peled, Model Checking. MIT Press, Cambridge, Massachusetts, London, 1999.
[5]
D. Grabowski, D. Platte, L. Hedrich, and E. Barke, "Time Constrained Verification of Analog Circuits using Model-Checking Algorithms," in Proceedings of the First Workshop on Formal Verification of Analog Circuits (FAC'05), ser. 3, vol. 153, April 2005, pp. 37--52.
[6]
E. M. Clarke, M. Fujita, P. C. McGeer, K. McMillan, J. C.-Y. Yang, and X. Zhao, "Multi Terminal Binary Decision Diagrams: An Efficient Data Structure for Matrix Representation," in International Workshop on Logic Synthesis (IWLS'93), May 1993.
[7]
W. Hartong, L. Hedrich, and E. Barke, "Model Checking Algorithms for Analog Verification," in Proceedings of the 39th Conference on Design Automation (DAC'02), June 2002, pp. 542--547.

Cited By

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  • (2009)Instrumenting AMS assertion verification on commercial platformsACM Transactions on Design Automation of Electronic Systems10.1145/1497561.149756414:2(1-47)Online publication date: 7-Apr-2009

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cover image ACM Conferences
ASP-DAC '08: Proceedings of the 2008 Asia and South Pacific Design Automation Conference
January 2008
812 pages
ISBN:9781424419227

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 21 January 2008

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ASPDAC '08
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ASP-DAC '08 Paper Acceptance Rate 122 of 350 submissions, 35%;
Overall Acceptance Rate 466 of 1,454 submissions, 32%

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  • (2009)Instrumenting AMS assertion verification on commercial platformsACM Transactions on Design Automation of Electronic Systems10.1145/1497561.149756414:2(1-47)Online publication date: 7-Apr-2009

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