research-article

SAT-controlled redundancy addition and removal: a novel circuit restructuring technique

Authors:

Shao-Lun Huang,

Chung-Yang Ric HuangAuthors Info & Claims

ASP-DAC '09: Proceedings of the 2009 Asia and South Pacific Design Automation Conference

Pages 191 - 196

Published: 19 January 2009 Publication History

Abstract

We proposed a novel Boolean Satisfiability (SAT)-controlled redundancy addition and removal (RAR) algorithm to resolve the performance and quality problems of the previous RAR approaches. With the introduction of modern SAT techniques, such as efficient Boolean constraint propagation (BCP), conflict-driven learning, and flexible decision procedure, our RAR engine can identify 10x more alternative wires/gates while achieving 70% reduction in runtime.

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Cited By

Lam TTang WYang XWu Y(2012)ECRACM Transactions on Design Automation of Electronic Systems10.1145/2348839.234885417:4(1-21)Online publication date: 1-Oct-2012
https://dl.acm.org/doi/10.1145/2348839.2348854
Wan LChen DShanbhag NPoncino MChou PAmerasekera A(2012)CCPProceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design10.1145/2333660.2333695(135-140)Online publication date: 30-Jul-2012
https://dl.acm.org/doi/10.1145/2333660.2333695
Yang XLam TWu YSapatnekar S(2010)ECRProceedings of the 47th Design Automation Conference10.1145/1837274.1837400(511-516)Online publication date: 13-Jun-2010
https://dl.acm.org/doi/10.1145/1837274.1837400

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Information & Contributors

Information

Published In

cover image ACM Conferences

ASP-DAC '09: Proceedings of the 2009 Asia and South Pacific Design Automation Conference

January 2009

902 pages

ISBN:9781424427482

General Chair:
Kazutoshi Wakabayashi
NEC Corporation

Sponsors

IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IPSJ SIGSLDM: Information Processing Society of Japan - SIG System LSI Design Methodology
IEICE ESS: Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society

Publisher

IEEE Press

Publication History

Published: 19 January 2009

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Research-article

Conference

ASPDAC '09

Sponsor:

SIGDA
IPSJ SIGSLDM
IEICE ESS

ASPDAC '09: Asia and South Pacific Design Automation Conference

January 19 - 22, 2009

Yokohama, Japan

Acceptance Rates

Overall Acceptance Rate 466 of 1,454 submissions, 32%

Upcoming Conference

ASPDAC '25

Sponsor:
sigda

30th Asia and South Pacific Design Automation Conference

January 20 - 23, 2025

Tokyo , Japan

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Cited By

Lam TTang WYang XWu Y(2012)ECRACM Transactions on Design Automation of Electronic Systems10.1145/2348839.234885417:4(1-21)Online publication date: 1-Oct-2012
https://dl.acm.org/doi/10.1145/2348839.2348854
Wan LChen DShanbhag NPoncino MChou PAmerasekera A(2012)CCPProceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design10.1145/2333660.2333695(135-140)Online publication date: 30-Jul-2012
https://dl.acm.org/doi/10.1145/2333660.2333695
Yang XLam TWu YSapatnekar S(2010)ECRProceedings of the 47th Design Automation Conference10.1145/1837274.1837400(511-516)Online publication date: 13-Jun-2010
https://dl.acm.org/doi/10.1145/1837274.1837400

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