research-article

BISD: scan-based built-in self-diagnosis

Authors:

Hans-Joachim WunderlichAuthors Info & Claims

DATE '10: Proceedings of the Conference on Design, Automation and Test in Europe

Pages 1243 - 1248

Published: 08 March 2010 Publication History

Abstract

Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may be necessary to apply additional deterministic patterns, which cause additional hardware costs. Secondly, the BIST-signature reveals only poor diagnostic information. Recently, the first issue has been addressed successfully. The paper at hand proposes a viable, effective and cost efficient solution for the second problem.

The paper presents a new method for Built-In Self-Diagnosis (BISD). The core of the method is an extreme response compaction architecture, which for the first time enables an autonomous on-chip evaluation of test responses with negligible hardware overhead. The key advantage of this architecture is that all data, which is relevant for a subsequent diagnosis, is gathered during just one test session.

The BISD method comprises a hardware scheme, a test pattern generation approach and a diagnosis algorithm. Experiments conducted with industrial designs substantiate that the additional hardware overhead introduced by the BISD method is on average about 15% of the BIST area, and the same diagnostic resolution can be obtained as for external testing.

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Cited By

Tille DGottinger BPfannkuchen UGraeb HSchlichtmann UShin Y(2018)On enabling diagnosis for 1-pin test fails in an industrial flowProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201656(233-238)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.5555/3201607.3201656

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Information & Contributors

Information

Published In

cover image ACM Conferences

DATE '10: Proceedings of the Conference on Design, Automation and Test in Europe

March 2010

1868 pages

ISBN:9783981080162

General Chairs:
Giovanni De Micheli
EPF Lausanne, CH
,
Bashir Al-Hashimi
University of Southampton, UK
,
Program Chairs:
Wolfgang Mueller
University of Paderborn, SE
,
Enrico Macii
Politecnico di Torino, IT

Sponsors

EDAA: European Design Automation Association
ECSI
EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
The IEEE Computer Society TTTC
The IEEE Computer Society DATC
The Russian Academy of Sciences: The Russian Academy of Sciences

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European Design and Automation Association

Leuven, Belgium

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Published: 08 March 2010

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DATE '10

Sponsor:

EDAA
EDAC
SIGDA
The Russian Academy of Sciences

DATE '10: Design, Automation and Test in Europe

March 8 - 12, 2010

Germany, Dresden

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

Tille DGottinger BPfannkuchen UGraeb HSchlichtmann UShin Y(2018)On enabling diagnosis for 1-pin test fails in an industrial flowProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201656(233-238)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.5555/3201607.3201656

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