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TimeWarp: rethinking timekeeping and performance monitoring mechanisms to mitigate side-channel attacks

Published: 09 June 2012 Publication History

Abstract

Over the past two decades, several microarchitectural side channels have been exploited to create sophisticated security attacks. Solutions to this problem have mainly focused on fixing the source of leaks either by limiting the flow of information through the side channel by modifying hardware, or by refactoring vulnerable software to protect sensitive data from leaking. These solutions are reactive and not preventative: while the modifications may protect against a single attack, they do nothing to prevent future side channel attacks that exploit other microarchitectural side channels or exploit the same side channel in a novel way.
In this paper we present a general mitigation strategy that focuses on the infrastructure used to measure side channel leaks rather than the source of leaks, and thus applies to all known and unknown microarchitectural side channel leaks. Our approach is to limit the fidelity of fine grain timekeeping and performance counters, making it difficult for an attacker to distinguish between different microarchitectural events, thus thwarting attacks. We demonstrate the strength of our proposed security modifications, and validate that our changes do not break existing software. Our proposed changes require minor -- or in some cases, no -- hardware modifications and do not result in any substantial performance degradation, yet offer the most comprehensive protection against microarchitectural side channels to date.

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  1. TimeWarp: rethinking timekeeping and performance monitoring mechanisms to mitigate side-channel attacks

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    Published In

    cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 40, Issue 3
    ISCA '12
    June 2012
    559 pages
    ISSN:0163-5964
    DOI:10.1145/2366231
    Issue’s Table of Contents
    • cover image ACM Conferences
      ISCA '12: Proceedings of the 39th Annual International Symposium on Computer Architecture
      June 2012
      584 pages
      ISBN:9781450316422
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 09 June 2012
    Published in SIGARCH Volume 40, Issue 3

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    • (2024)Cross-Core Interrupt Detection: Exploiting User and Virtualized IPIsProceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security10.1145/3658644.3690242(94-108)Online publication date: 2-Dec-2024
    • (2024)TF-Timer: Mitigating Cache Side-Channel Attacks in Cloud through a Targeted Fuzzy Timer2024 IEEE Wireless Communications and Networking Conference (WCNC)10.1109/WCNC57260.2024.10571330(1-6)Online publication date: 21-Apr-2024
    • (2024)Veiled Pathways: Investigating Covert and Side Channels Within GPU Uncore2024 57th IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO61859.2024.00088(1169-1183)Online publication date: 2-Nov-2024
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