Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.5555/2555692.2555710acmconferencesArticle/Chapter ViewAbstractPublication PagesesweekConference Proceedingsconference-collections
research-article

Instruction set extensions for dynamic time warping

Published: 29 September 2013 Publication History
  • Get Citation Alerts
  • Abstract

    Processor specialization through application-specific instruction set customization can significantly improve performance while reducing energy. Due to the costs associated with semiconductor fabrication, specialized processors are only viable for products with high production volumes. The emergence of low-cost sensor-based computing products in recent years has created an urgent need to process time-series data with the utmost efficiency. Although most sensor data is fixed-point, the normalization process---an absolute necessity for highly accurate similarity search of time-series data---converts the data to floating-point in order to avoid a loss in precision. The sensors that collect time-series data are typically connected to low-power microcontrollers or RISC processors sans floating point units. The computational requirements of real-time similarity search would overwhelm such processors. To address this concern, we introduce a specialized instruction set for time-series data mining applications to a 32-bit embedded processor, yielding a 4.87x performance improvement and a 78% reduction in energy consumption compared to a highly optimized software implementation.

    References

    [1]
    Ball, T., and Larus, J. R., "Optimally profiling and tracing programs," ACM Trans. Programming Languages and Systems, vol. 16, no. 4, July, 1994, pp. 1319--1360. DOI= http://dx.doi.org/10.1145/183432.183527
    [2]
    Chong, Y. J. and Parameswaran, S., "Custom floating-point unit generation for embedded systems," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 5, May, 2009, pp. 638--650. DOI= http://dx.doi.org/10.1109/TCAD.2009.2013999
    [3]
    Dally, W. J., et al., "Efficient embedded computing," Computer, vol. 41, no. 7, July 2008, pp. 27--32. DOI= http://dx.doi.org/10.1109/MC.2008.224
    [4]
    de Dinechin, F., and Pasca, B., "Designing custom arithmetic data paths with FloPoCo," IEEE Design and Test of Computers, vol. 28, no. 4, July-Aug. 2011, pp. 18--27. DOI= http://dx.doi.org/10.1109/MDT.2011.44
    [5]
    Ding, H., et al., "Querying and mining of time series data: experimental comparison of representations and distance measures," Proceedings of the VLDB Endowment, vol. 1, no. 2, Aug. 2008, pp. 1542--1552. URL= http://dl.acm.org/citation.cfm?id=1454226
    [6]
    Evans, D., "The Internet of Things: How the Next Evolution of The Internet Is Changing Everything," Cisco Internet Business Solutions Group. White Paper. April, 2011. URL= http://www.cisco.com/web/about/ac79/docs/innov/IoT_IBSG_0411FINAL.pdf
    [7]
    Fu, A. W-C., et al., "Scaling and time warping in time series querying," International Journal on Very Large Data Bases, vol. 17, no. 4, July, 2008, pp. 899--921. DOI= http://dx.doi.org/10.1007/s00778-006-0040-z
    [8]
    Hameed, R., et al., "Understanding sources of inefficiency in general-purpose chips," Comm. ACM, vol. 54, no. 10, Oct. 2011, pp. 85--93. DOI= http://dx.doi.org/10.1145/2001269.2001291
    [9]
    Hockert, N., and Compton, K., "Improving floating-point performance in less area: fractured floating point units (FFPUs)," Journal of Signal Processing Systems, vol. 67, no. 1, April, 2012, pp. 31--46. DOI= http://dx.doi.org/10.1007/s11265-010-0561-y
    [10]
    Iwata, T., et al., "A speech recognition processor," IEEE Int. Solid-State Circuits Conf. (ISSCC '83), pp. 120--121, Feb. 23--25, 1983, DOI= http://dx.doi.org/10.1109/ISSCC.1983. 1156535
    [11]
    Keogh, E., and Kasetty, S., "On the need for time series data mining benchmarks: a survey and empirical demonstration," Journal of Data Mining and Knowledge Discovery, vol. 7, no. 4, Oct. 2003, pp. 349--371. DOI= http://dx.doi.org/10.1023/A:1024988512476
    [12]
    Keogh, E., et al., "Supporting exact indexing of arbitrarily rotated shapes and periodic time series under Euclidean and warping distance measures," International Journal on Very Large Data Bases, vol. 18, no. 3, June, 2009, pp. 611--630. DOI= http://dx.doi.org/10.1007/s00778-008-0111-4
    [13]
    E. Keogh, et al., "The UCR Time Series Classification/Clustering Homepage," URL= http://www.cs.ucr.edu/~eamonn/time_series_data/
    [14]
    Kim, S-W., Park, S., and Chu, W. W., "An index-based approach for similarity search supporting time warping in large sequence databases," 17th Int. Conf. Data Engr. (ICDE '01), pp. 607--614, Apr. 2--6, 2001, DOI= http://dx.doi.org/10.1109/ICDE.2001.914875
    [15]
    Langhammer, M., "Floating-point datapath synthesis for FPGAs," Int. Conf. Field Programmable Logic and Applications (FPL '08), pp. 355--360, Sep. 8--10, 2008, DOI= http://dx.doi.org/10.1109/FPL.2008.4629963
    [16]
    Lemire, D., "Faster retrieval with a two-pass dynamic-time-warping lower bound," Pattern Recognition, vol. 42, no. 9, Sep. 2009, pp. 2169--2180. DOI= http://dx.doi.org/10.1016/j.patcog.2008.11.030
    [17]
    Loftian, R., and Jafari, R., "An ultra-low power hardware accelerator architecture for wearable computers using dynamic time warping," Design Automation and Test in Europe (DATE '13), pp. 913--916, Mar. 18--22, 2013, DOI= http://dx.doi.org/10.7873/DATE.2013.192
    [18]
    Loftian, R., and Jafari, R., "A low power wake-up circuitry based on dynamic time warping for body sensor networks," Int. Conf. Body Sensor Networks (BSN '11), pp. 83--88, May 23--25, 2011, DOI= http://dx.doi.org/10.1109/BSN.2011.43
    [19]
    Lowy, M., et al., "An architecture for a speech recognition system," IEEE Int. Solid-State Circuits Conf. (ISSCC '83), pp. 118--119, Feb. 23--25, 1983, DOI= http://dx.doi.org/10.1109/ISSCC.1983.1156528
    [20]
    Owen, R. E., "A VLSI dynamic time warp processor for connected and isolated word speech recognition," IEEE Int. Conf. Acoustics, Speech, and Signal Processing (ICASSP '85), pp. 985--988, Apr. 26--29, 1985, DOI= http://dx.doi.org/10.1109/ICASSP.1985.1168159
    [21]
    Pozzi, L., Atasu, K., and Ienne, P., "Exact and approximate algorithms for the extension of embedded processor instruction sets," IEEE Trans. CAD of Integrated Circuits and Systems, vol. 25, no. 7, July 2006, pp. 1209--1229. DOI= http://dx.doi.org/10.1109/TCAD.2005.855950
    [22]
    Quenot, G., et al., "A dynamic time warp VLSI processor for continuous speech recognition," IEEE Int. Conf. Acoustics, Speech, and Signal Processing (ICASSP '86), pp. 1549--1552, Apr. 7--11, 1988, DOI= http://dx.doi.org/10.1109/ICASSP.1986.1168945
    [23]
    Rakthanmanon, T., et al., "Searching and mining trillions of time series subsequences under dynamic time warping," 18th ACM SIGKDD Int. Conf. Knowledge Discovery and Data Mining (KDD '12), pp. 262--270, Aug. 12--16, 2012 DOI= http://dx.doi.org/10.1145/2339530.2339576
    [24]
    Sakoe, H., and Chiba, S. "Dynamic programming optimization for spoken word recognition," IEEE Trans. Acoustics, Speech, and Signal Processing, vol. 26, no. 1, Feb. 1978, pp. 43--49, DOI= http://dx.doi.org/10.1109/TASSP.1978.1163055
    [25]
    Sart, D., et al., "Accelerating dynamic time warping subsequence search with GPUs and FPGAs," 10th IEEE Int. Conf. Data Mining (ICDM '10), pp. 1001--1006, Dec. 13--17, 2010, DOI= http://dx.doi.org/10.1109/ICDM.2010.21
    [26]
    Sethia, A., et al., "A customized processor for energy efficient scientific computing," IEEE Trans. Computers, vol. 61, no. 12, Dec. 2012, pp. 1711--1723. DOI= http://dx.doi.org/10.1109/TC.2012.144
    [27]
    Wang, Z., et al., "Accelerating subsequence similarity search based on dynamic time warping distance with FPGA," ACM/SIGDA Int. Symp. Field Programmable Gate Arrays (FPGA '13), pp. 53--62, Feb. 11--13, 2013, DOI= http://dx.doi.org/10.1145/2435264.2435277
    [28]
    Xilinx, "Virtex-6 User Guide Xilinx Corporation," 2010.
    [29]
    Xilinx, "MicroBlaze Processor Reference Guide," October 2010.
    [30]
    Xilinx, "LogiCORE IP Fast Simplex Link (FSL) V20 Bus (v2.11c)," April 2010.
    [31]
    Xilinx, "Xilinx Power Tools Tutorial UG733 (v14.2)," July 25 2012.

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    CODES+ISSS '13: Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
    September 2013
    335 pages
    ISBN:9781479914173

    Sponsors

    Publisher

    IEEE Press

    Publication History

    Published: 29 September 2013

    Check for updates

    Author Tags

    1. dynamic time warping (DTW)
    2. instruction set extension (ISE)
    3. similarity search
    4. time-series

    Qualifiers

    • Research-article

    Conference

    ESWEEK'13
    ESWEEK'13: Ninth Embedded System Week
    September 29 - October 4, 2013
    Quebec, Montreal, Canada

    Acceptance Rates

    CODES+ISSS '13 Paper Acceptance Rate 31 of 111 submissions, 28%;
    Overall Acceptance Rate 280 of 864 submissions, 32%

    Upcoming Conference

    ESWEEK '24
    Twentieth Embedded Systems Week
    September 29 - October 4, 2024
    Raleigh , NC , USA

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • 0
      Total Citations
    • 127
      Total Downloads
    • Downloads (Last 12 months)0
    • Downloads (Last 6 weeks)0
    Reflects downloads up to 10 Aug 2024

    Other Metrics

    Citations

    View Options

    Get Access

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media