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Dedication load based dispatching rule for photolithography machines with dedication constraint

Published: 11 December 2016 Publication History

Abstract

This paper addresses a semiconductor wafer fabrication (FAB) scheduling problem with dedication constraint. Under dedication constraint, a fabrication lot must be processed using the same photo machine at all photolithography (photo) steps. To solve the utilization decrease of photo machines by dedication, we propose a dedication load as the sum of the workload of lots dedicated to each photo machine. When a photo machine becomes available to process a new lot, if its dedication load is less than the average of similar machines, then the photo machine will be assigned to process the first step of a new lot in the event that one is available. To prove the performance of this proposed dispatching rule, we developed a simulation model based on MIMAC6, and conducted a simulation by using MOZART®. The proposed dispatching rule was implemented and outperformed conventional dispatching rules.

References

[1]
Akcalt, E., K. Nemoto, and R. Uzsoy. 2001. "Cycle-time Improvements for Photolithography Process in Semiconductor Manufacturing." IEEE Transactions on Semiconductor Manufacturing 14:48--56.
[2]
Andreas, K., and W. Gerald. 2011. "An Optimization Approach for Parallel Machine Problems with Dedication Constraints: Combining Simulation and Capacity Planning." In Proceedings of the 2011 Winter Simulation Conference, edited by S. Jain, R. R. Creasey, J. Himmelspach, K. P. White, and M. Fu, 1986--1998. Piscataway, New Jersey: Institute of Electrical and Electronics Engineers, Inc.
[3]
Fowler, J., and J. Robinson. 1995. "Measurement and Improvement of Manufacturing Capacities (MIMAC): Final Report." Technical Report 95062861A-TR, SEMATECH, Austin, TX.
[4]
Hiroyasu, T., I. Hiroaki, H. Hirotaka, and C. Takayuki. 2005. "Dynamic Load Balancing Among Multiple Fabrication Lines Through Estimation of Minimum Inter-Operation Time." IEEE Transactions on Semiconductor Manufacturing 18(1):202--213.
[5]
Huy, N. A., A. M. D. Shr, H. N. A. Pham, and P. P. Chen. 2008. "An Integer Linear Programming Approach for Dedicated Machine Constraint." In Proceedings of the Seventh IEEE/ACIS International Conference on Computer and Information Science, 69--74.
[6]
Johri, P. K. 1993. "Practical Issues in Scheduling and Dispatching in Semiconductor Wafer Fabrication." Journal of Manufacturing Systems 12:474--483.
[7]
Kidambi, M. R. 2001. "Impact of Lot Dedication on the Performance of the FAB." Master. Thesis, Department of Industrial and Systems Engineering, Virginia Polytechnic Institute and State University, Blacksburg, Virginia.
[8]
Kim, Y. D., J. U. Kim, S. K. Lim, and H. B. Jun. 1998. "Due-Date Based Scheduling and Control Policies in a Multiproduct Semiconductor Wafer Fabrication Facility." IEEE Transactions on Semiconductor Manufacturing 11(1):155--164.
[9]
Ko, K., B. H. Kim, and S. K. Yoo. 2013. "Simulation Based Planning & Scheduling System: MOZART®." In Proceedings of the Winter Simulation Conference, edited by R. Pasupathy, S.-H. Kim, A. Tolk, R. Hill, and M. E. Kuhl, 4103--4104. Piscataway, New Jersey: Institute of Electrical and Electronics Engineers, Inc.
[10]
Lin, J. T., F. K. Wang, and P. C. Kuo. 2005. "A Parameterized-Dispatching Rule for a Logic IC Sort in a Wafer Fabrication." Production Planning & Control 16(5):426--436.
[11]
Liu, A., A. M. D. Shr, and Y. Cheng. 2006. "A Fuzzy Scheduling System for Dedicated Machine Constraint." In Proceedings of the 2006 Joint Conference on Information Sciences, Kaohsiung, Taiwan.
[12]
Miwa, T., N. Nishihara, and K. Yamamoto. 2005. "Automated Stepper Load Balance Allocation System." IEEE Transactions on Semiconductor Manufacturing 18(4):510--516.
[13]
Mönch. L., M. Prause, and V. Schmalfuss. 2001. "Simulation-Based Solution of Load-Balancing Problems in the Photolithography Area of a Semiconductor Wafer Fabrication Facility." In Proceedings of the 2001 Winter Simulation Conference, 1170--1177. Piscataway, New Jersey: Institute of Electrical and Electronics Engineers, Inc.
[14]
Park, S. C., E. Ahn, Y. Chung, K. Yang, B. H. Kim, and J. C. Seo. 2013. "Fab Simulation with Recipe Arrangement of Tools." In Proceedings of the 2013 Winter Simulation Conference, edited by R. Pasupathy, S. H. Kim, A. Tolk, R. Hill, and M. E. Kuhl, 3840--3849. Piscataway, New Jersey: Institute of Electrical and Electronics Engineers, Inc.
[15]
Pham, H. N. A., A. M. D. Shr, and P. P. Chen. 2008. "An Integer Linear Programming Approach for Dedicated Machine Constraint." International Conference on Computer and Information Science, Washington DC, 69--74.
[16]
Sha, D. T., S. Y. Hsu, Z. H. Che, and C. H. Chen. 2006. "A Dispatching Rule for Photolithography Scheduling with an On-Line Rework Strategy." Computers & Industrial Engineering 50:233--247.
[17]
Shirley, J. T. 2011. "Bottleneck Management Strategies in Semiconductor Wafer Fabrication Facilities." In Proceedings of the 2011 International Conference on Industrial Engineering and Operations Management, 3--8. Kuala Lumpur, Malaysia.
[18]
Shr, A. M. D., A. Liu, and P. P. Chen. 2006. "A Heuristic Load Balancing Scheduling Approach for Dedicated Machine Constraint." In Proceedings of the 19th International Conference on Industrial, Engineering & Other Applications of Applied Intelligent Systems(IEA/AIE'06), edited by M. Ali and R. Dapoigny, 750--759. Lecture Notes in Artificial Intelligence (LNAI) 4031, Springer-Verlag, Berlin Heidelberg.
[19]
Shr, A. M. D., A. Liu, and P. P. Chen. 2006. "A Load Balancing Scheduling Approach for Dedicated Machine Constraint." In Proceedings of the 8th International Conference on Enterprise Information Systems ICEIS 2006, 170--175. Paphos, Cyprus.
[20]
Shr, A. M. D., A. Liu, and P. P. Chen. 2006. "A Load Balancing Method for Dedicated Photolithography Machine Constraint." Information Technology for Balanced Manufacturing Systems 220:339--348.
[21]
Shr, A. M. D., A. Liu, and P. P. Chen. 2008. "Load Balancing Among Photolithography Machines in the Semiconductor Manufacturing System." Journal of Information Science and Engineering 24:379--391.
[22]
Uzsoy R., L. K. Church, and I. M. Ovacik. 1992. "Dispatching Rules for Semiconductor Testing Operations: a Computational Study." In Proceedings of the thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium, 272--276.
[23]
Wu, M. C., Y. L. Huang, Y. C. Chang, and K. F. Yang. 2006. "Dispatching in Semiconductor FABs with Dedication Features." International Journal of Advanced Manufacturing Technology 28:978--984.
[24]
Wu, M. C., S. Chiou, and C. Chen. 2008. "Dispatching for Make-to-order Wafer Fabs with Dedication and Mask Set-up Characteristics." International Journal of Production Research 46:3993--4009.
[25]
Wu, M. C., J. Jiang, and W. Chang. 2008. "Scheduling a Hybrid MTO/MTS Semiconductor Fab with Dedication Features." International Journal of Production Economics 112:416--426.
[26]
Yang, J. H. 2015. "Minimizing Total Completion Time in a Two-stage Hybrid Flow Shop with Dedicated Machines at the First Stage." Computers and Operations Research 58:1--8.

Cited By

View all
  • (2017)Towards a new simulation testbed for semiconductor manufacturingProceedings of the 2017 Winter Simulation Conference10.5555/3242181.3242495(1-12)Online publication date: 3-Dec-2017
  • (2017)Two boundary based dispatching rule for on-time delivery and throughput of wafer fabs with dedication constraintsProceedings of the 2017 Winter Simulation Conference10.5555/3242181.3242490(1-10)Online publication date: 3-Dec-2017

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cover image ACM Conferences
WSC '16: Proceedings of the 2016 Winter Simulation Conference
December 2016
3974 pages
ISBN:9781509044849

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In-Cooperation

  • SAS
  • AnyLogic: The AnyLogic Company
  • Palgrave: Palgrave Macmillan
  • FlexSim: FlexSim Software Products, Inc.
  • ASA: American Statistical Association
  • IEEE/SMC: Institute of Electrical and Electronics Engineers: Systems, Man, and Cybernetics Society
  • Simio: Simio LLC
  • ODU: Old Dominion University
  • ASIM: Arbeitsgemeinschaft Simulation
  • ExtendSim: ExtendSim
  • NIST: National Institute of Standards & Technology
  • Amazon Simulations: Amazon Simulations

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IEEE Press

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Published: 11 December 2016

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WSC '16
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WSC '16: Winter Simulation Conference
December 11 - 14, 2016
Virginia, Arlington

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Overall Acceptance Rate 3,413 of 5,075 submissions, 67%

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Cited By

View all
  • (2017)Towards a new simulation testbed for semiconductor manufacturingProceedings of the 2017 Winter Simulation Conference10.5555/3242181.3242495(1-12)Online publication date: 3-Dec-2017
  • (2017)Two boundary based dispatching rule for on-time delivery and throughput of wafer fabs with dedication constraintsProceedings of the 2017 Winter Simulation Conference10.5555/3242181.3242490(1-10)Online publication date: 3-Dec-2017

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