On the limits of machine learning-based test: a calibrated mixed-signal system case study
Abstract
Testing analog, mixed-signal and RF circuits represents the main cost component for testing complex SoCs. A promising solution to alleviate this cost is the machine learning-based test strategy. These test techniques are an indirect test approach that replaces costly specification measurements by simpler signatures. Machine learning algorithms are used to map these signatures to the performance parameters. Although this approach has a number of undoubtable advantages, it also opens new issues that have to be addressed before it can be widely adopted by the industry. In this paper we present a machine learning-based test for a complex mixed-signal system -i.e. a state-of-the-art pipeline ADC- that includes digital calibration. This paper shows how the introduction of digital calibration for the ADC has a serious impact in the proposed test as calibration completely decorrelates signatures from the target specification in the presence of local mismatch.
References
[1]
P. N. Variyam and A. Chatterjee, "Enhancing test effectiveness for analog circuits using synthesized measurements," in Proc. of the IEEE VLSI Test Symposium, 1998, pp. 132--137.
[2]
M. Barragan and G. Leger, "Efficient selection of signatures for analog/RF alternate test," in Test Symposium (ETS), 2013 18th IEEE European, May 2013, pp. 1--6.
[3]
H. Ayari et al., "Smart selection of indirect parameters for DC-based alternate RF IC testing," VLSI Test Symposium, pp. 19--24, 2012.
[4]
S. S. Akbay and A. Chatterjee, "Feature extraction based built-in alternate test of RF components using a noise reference," in Proc. VLSI Test Symposium, 2004, pp. 273--278.
[5]
M. Barragan and G. Leger, "A Procedure for Alternate Test Feature Design and Selection," IEEE Design Test, vol. 32, no. 1, pp. 18--25, Feb. 2015.
[6]
H. G. Stratigopoulos, P. Faubet, Y. Courant, and F. Mohamed, "Multi-dimensional analog test metrics estimation using extreme value theory and statistical blockade," Design Automation Conference (DAC), 2013 50th ACM / EDAC / IEEE, pp. 1--7, May 29 2013-June 7 2013.
[7]
E. Yilmaz and S. Ozev, "Adaptive-Learning-Based Importance Sampling for Analog Circuit DPPM Estimation," IEEE Design Test, vol. 32, no. 1, pp. 36--43, Feb. 2015.
[8]
M. Barragan, H. G. Stratigopoulos, S. Mir, H. Le-Gall, N. Bhargava, and A. Bal, "Practical Simulation Flow for Evaluating Analog and Mixed-Signal Test Techniques," IEEE Design & Test, vol. 33, no. 6, pp. 46--54, 2016.
[9]
G. N. Stenbakken, "Effects of nonmodel errors on model-based testing," IEEE Transactions on Instrumentation and Measurement, vol. 45, no. 2, pp. 384--388, 1996.
[10]
A. Zjajo, M. J. Barragan, and J. P. de Gyvez, "Low-Power Die-Level Process Variation and Temperature Monitors for Yield Analysis and Optimization in Deep-Submicron CMOS," IEEE Transactions on Instrumentation and Measurement, vol. 61, no. 8, pp. 2212--2221, August 2012.
[11]
L. Abdallah, H. G. Stratigopoulos, S. Mir, and C. Kelma, "Experiences with non-intrusive sensors for RF built-in test," in Proc. International Test Conference, 2012.
[12]
V. Natarajan, S. Sen, A. Banerjee, A. Chatterjee, G. Srinivasan, and F. Taenzler, "Analog Signature- Driven Postmanufacture Multidimensional Tuning of RF Systems," Design & Test of Computers, IEEE, vol. 27, no. 6, pp. 6--17, 2010.
[13]
M. Andraud, H.-G. Stratigopoulos, and E. Simeu, "One-shot calibration of RF circuits based on non-intrusive sensors," in Proc. Design Automation Conference (DAC). IEEE, 2014, pp. 1--6.
[14]
G. Volanis, D. Maliuk, Y. Lu, K. S. Subramani, A. Antonopoulos, and Y. Makris, "On-die learning-based self-calibration of analog/RF ICs," in Proc. VLSI Test Symposium (VTS). IEEE, 2016, pp. 1--6.
[15]
A. N. Karanicolas, H.-S. Lee, and K. L. Barcrania, "A 15-b 1-Msample/s digitally self-calibrated pipeline ADC," IEEE Journal of Solid-State Circuits, vol. 28, no. 12, pp. 1207--1215, 1993.
[16]
J. D. Wichard, M. J. Ogorzalek, and C. Merkwirth, "Entool-a toolbox for ensemble modelling," in Europhysics Conference Abstracts ECA, vol. 27, 2003.
[17]
M. J. Barragán et al., "Alternate test of lnas through ensemble learning of on-chip digital envelope signatures," Journal of Electronic Testing, vol. 27, no. 3, pp. 277--288, 2011.
[18]
H.-G. Stratigopoulos, S. Mir, E. Acar, and S. Ozev, "Defect filter for alternate RF test," in Proc. European Test Symposium, Sevilla, Spain, May 2009, pp. 101--106.
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Published In
March 2017
1814 pages
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European Design and Automation Association
Leuven, Belgium
Publication History
Published: 27 March 2017
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