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Efficient vector processing on dataflow supercomputer SIGMA-1

Authors:

K. Hiraki,

S. Sekiguchi,

T. ShimadaAuthors Info & Claims

Supercomputing '88: Proceedings of the 1988 ACM/IEEE conference on Supercomputing

Pages 374 - 381

Published: 01 November 1988 Publication History

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Abstract

Efficiency in vector handling is the key to obtaining high performance in numerical programs. So far, the main defect of dataflow computers is inefficiency in vector processing. We propose structure-flow processing as a new scheme for handling data structures such as vectors in dataflow architecture. The main objective of structure-flow processing is to enhance vector processing performance of a dataflow computer. In this structure-flow processing scheme, the arrival of a data structure unrolls the control structure which processes the data structure itself. A high-level structure is an implementation mechanism of a structure-flow scheme on a practical dataflow computer. Since all the computation is executed by instruction-level dataflow architecture, scalar level parallelism and function level parallelism are also fully utilized by this scheme. The SIGMA-1 architecture that supports high-level structure processing are discussed and the performance is measured. According to the measurement, vector programs can be executed three to four times faster than by unfolding using scalar dataflow processing.

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Sekiguchi SShimada THiraki K(1991)Sequential description and parallel execution language DFCII dataflow supercomputersProceedings of the 5th international conference on Supercomputing10.1145/109025.109045(57-66)Online publication date: 1-Jun-1991
https://dl.acm.org/doi/10.1145/109025.109045

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Supercomputing '88: Proceedings of the 1988 ACM/IEEE conference on Supercomputing

November 1988

458 pages

ISBN:081860882X

Chairman:
G. A. Michael
Lawrence Livermore National Laboratory

In-Cooperation

NSF: National Science Foundation
NASA: National Aeronatics and Space Administration
Supercomputer Edu & Resch Ctr: Supercomputer Edu & Resch Ctr

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IEEE Computer Society Press

Washington, DC, United States

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Published: 01 November 1988

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Supercomputing88: International Conference for High Performance Computing, Networking, Storage and Analysis

November 12 - 17, 1988

Florida, Orlando, USA

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Sekiguchi SShimada THiraki K(1991)Sequential description and parallel execution language DFCII dataflow supercomputersProceedings of the 5th international conference on Supercomputing10.1145/109025.109045(57-66)Online publication date: 1-Jun-1991
https://dl.acm.org/doi/10.1145/109025.109045

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The SIGMA-1 dataflow computer

An efficient pipelined dataflow processor architecture

A model for dataflow based vector execution

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The SIGMA-1 dataflow computer

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