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Asynchronous Design By Conversion: Converting Synchronous Circuits into Asynchronous Ones

Published: 16 February 2004 Publication History

Abstract

A novel methodology and algorithm for the design of large low-power asynchronous systems are described. The system is synthesized by a commercial tool as a synchronous circuit, and subsequently converted into an asynchronous one. The conversion algorithm consists ofextracting input and output sets, replacing the storage elements, identifying fork and join sets, and constructing request and acknowledge networks. A DLAP (Doubly Latched Asynchronous Pipeline) architecture is employed. The resulting asynchronous circuit can adapt its effective operating frequency to the supply voltage, facilitating flexible and efficient power management. The algorithm has been validated on several circuits.

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Cited By

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  • (2009)Elastic circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203043628:10(1437-1455)Online publication date: 1-Oct-2009
  • (2004)Performance enhancement in phased logic circuits using automatic slack-matching buffer insertionProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.989051(413-416)Online publication date: 26-Apr-2004

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      cover image ACM Conferences
      DATE '04: Proceedings of the conference on Design, automation and test in Europe - Volume 2
      February 2004
      606 pages
      ISBN:0769520855

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      Published: 16 February 2004

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      • (2009)Elastic circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203043628:10(1437-1455)Online publication date: 1-Oct-2009
      • (2004)Performance enhancement in phased logic circuits using automatic slack-matching buffer insertionProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.989051(413-416)Online publication date: 26-Apr-2004

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