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CMOS RF Down-Conversion Mixer Design for Low-Power Wireless Communications

Published: 01 June 2008 Publication History

Abstract

This paper aims to study the design of a low-power single-balanced mixer for downconversion in wireless RF receivers. The proposed circuit is designed to work at a radiofrequency of 1.9GHz using CMOS 0.18 µm technology. The obtained results show a conversion gain equal to 7 dB and low power consumption of 3.86mW at 1.8.V supply voltage. The single side band noise figure performance was founded to be 8.dB. These results show a good potential of this CMOS mixer and justify its use for low-power wireless communications.

References

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Cited By

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  • (2014)Design Optimization Methodology Based on Inversion Coefficient Parameter for CMOS RF CircuitsArabian Journal for Science and Engineering10.1007/s13369-014-1429-439:12(8935-8946)Online publication date: 9-Nov-2014

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Published In

cover image Ubiquity
Ubiquity  Volume 2008, Issue June
June 2008
9 pages
EISSN:1530-2180
DOI:10.1145/1403922
Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 2008
Published in UBIQUITY Volume 2008, Issue June

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Author Tags

  1. CMOS technology
  2. RF mixer
  3. analog design
  4. conversion gain
  5. wireless communications

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View all
  • (2014)Design Optimization Methodology Based on Inversion Coefficient Parameter for CMOS RF CircuitsArabian Journal for Science and Engineering10.1007/s13369-014-1429-439:12(8935-8946)Online publication date: 9-Nov-2014

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