Silicon nanowires were grown by the vapour-liquid-solid (VLS) mechanism using gold as the catalys... more Silicon nanowires were grown by the vapour-liquid-solid (VLS) mechanism using gold as the catalyst and silane as the precursor. Although the crystalline quality of the wires is very high, sometimes defects can be observed. Some examples are shown. Gold clusters were observed on the lateral sides of the wires by means of scanning transmission electron microscopy (STEM), energy dispersive X-ray
ABSTRACT The transistor (100) comprises a nanowire (101) at least partially forming a channel of ... more ABSTRACT The transistor (100) comprises a nanowire (101) at least partially forming a channel of the transistor (100), a source contact (102) arranged at a first longitudinal end (103) of the nanowire (101), a drain contact (104) arranged at a second longitudinal end (105) of the nanowire (101), and a gate (106) arranged on the nanowire (101) between the source contact (102) and the drain contact (104). Furthermore, a portion of the gate (106) covers, with the interposition of a dielectric material (107), a corresponding portion of the source contact (102) and/or of the drain contact (104) arranged along the nanowire (101) between its two longitudinal ends (103, 105).
ABSTRACT Silicon nanotrees (SiNTrs) have been grown by Chemical Vapor Deposition (CVD) via gold c... more ABSTRACT Silicon nanotrees (SiNTrs) have been grown by Chemical Vapor Deposition (CVD) via gold catalysis and a three steps process: trunks and branches growth are separated by a new gold catalyst deposition. The influence of growth conditions and the second gold catalyst deposition method on SiNTrs morphology are investigated. SiNTrs based electrodes show a capacitive behavior and better capacitance than the corresponding silicon nanowires (SiNWs) electrode. Electrode capacitance is increased up to 9000 mu F cm(-2), i.e. 150 fold higher than for bulk silicon. Micro-supercapacitors with SiNTrs electrodes have a remarkable stability (only 1.2% loses of their initial capacitance after more than one million cycles). The use of an ionic liquid based electrolyte leads to a high maximum power density (around 225 mW cm(-2)) which is competitive with Onion Like Carbon based micro-supercapacitors.
ABSTRACTThe authors present the technological routes used to build planar and vertical gate all-a... more ABSTRACTThe authors present the technological routes used to build planar and vertical gate all-around (GAA) field-effect transistors (FETs) using both Si and SiGe nanowires (NWs) and the electrical performances of the as-obtained components. Planar FETs are characterized in back gate configuration and exhibit good behavior such as an ION/IOFF ratio up to 106. Hysteretic behavior and sub-threshold slope values with respect to surface and oxide interface trap densities are discussed. Vertical devices using Si NWs show good characteristics at the state of the art with ION/IOFF ratio close to 106 and sub-threshold slope around 125 mV/decade while vertical SiGe devices also obtained with the same technological processes, present an ION/IOFF ratio from 103 to 104but with poor dynamics which can be explained by the high interface traps density.
... a CEA Grenoble DRFMC/SP2M/SINAPS Minatec, 17 rue des Martyrs 38054 Grenoble Cedex 9, France. ... more ... a CEA Grenoble DRFMC/SP2M/SINAPS Minatec, 17 rue des Martyrs 38054 Grenoble Cedex 9, France. b UJF Grenoble 1 IUT-1, 17 rue Claude Bernard 38000 Grenoble, France. c CEA DRFMC/SP2M/LEMMA, 17 rue des Martyrs 38054 Grenoble Cedex 9, France. ...
Page 1. Reduced pressure chemical vapour deposition of SiGe virtual substrates for high mobility ... more Page 1. Reduced pressure chemical vapour deposition of SiGe virtual substrates for high mobility devices This article has been downloaded from IOPscience. ... 312 Page 4. Reduced pressure chemical vapour deposition of SiGe virtual substrates for high mobility devices 1 10 100 ...
Physica E: Low-dimensional Systems and Nanostructures, 2009
We have carried out photoluminescence measurements of silicon nanowires (SiNWs) obtained by the c... more We have carried out photoluminescence measurements of silicon nanowires (SiNWs) obtained by the chemical vapor deposition method with a copper-catalyzed vapor–liquid–solid mechanism. The nanowires have a typical diameter of 200nm. Spectrum of the as-grown SiNWs exhibits radiative states below the energy bandgap and a small contribution near the silicon gap energy at 1.08eV. A thermal oxidation allows to decrease the
Highly n-doped silicon nanowires (SiNWs) with several lengths have been deposited via chemical va... more Highly n-doped silicon nanowires (SiNWs) with several lengths have been deposited via chemical vapor deposition on silicon substrate. These nanostructured silicon substrates have been used as electrodes to build symmetrical micro-ultracapacitors. These devices show a quasi-ideal capacitive behavior in organic electrolyte (1 M NEt4BF4 in propylene carbonate). Their capacitance increases with the length of SiNWs on the electrode and has been improved up to 10 μFcm−2 by using 20 μm SiNWs, i.e., ≈10-fold bulk silicon capacitance. This device exhibits promising galvanostatic charge/discharge cycling stability with a maximum power density of 1.4 mW cm−2.
We study by time-resolved low temperature photoluminescence (PL) experiments of the electronic st... more We study by time-resolved low temperature photoluminescence (PL) experiments of the electronic states of silicon nanowires (SiNWs) grown by gold catalyzed chemical vapor deposition and passivated by thermal SiO(2). The typical recombination line of free carriers in gold-catalyzed SiNWs (Au-SiNWs) is identified and studied by time-resolved experiments. We demonstrate that intrinsic Auger recombination governs the recombination dynamic of the dense e-h plasma generated inside the NW. In a few tens of nanoseconds after the pulsed excitation, the density of the initial electronic system rapidly decreases down to reach that of a stable electron-hole liquid phase. The comparison of the PL intensity decay time of Au-SiNWs with high crystalline quality and purity silicon layer allows us to conclude that the Au-SiNW electronic properties are highly comparable to those of bulk silicon crystal.
Silicon nanowires can be prepared with single-crystal structures, diameters as small as several n... more Silicon nanowires can be prepared with single-crystal structures, diameters as small as several nanometers and controllable hole and electron doping, and thus represent powerful building blocks for nanoelectronics devices such as field effect transistors. To explore the potential ...
Silicon nanowires were grown by the vapour-liquid-solid (VLS) mechanism using gold as the catalys... more Silicon nanowires were grown by the vapour-liquid-solid (VLS) mechanism using gold as the catalyst and silane as the precursor. Although the crystalline quality of the wires is very high, sometimes defects can be observed. Some examples are shown. Gold clusters were observed on the lateral sides of the wires by means of scanning transmission electron microscopy (STEM), energy dispersive X-ray
ABSTRACT The transistor (100) comprises a nanowire (101) at least partially forming a channel of ... more ABSTRACT The transistor (100) comprises a nanowire (101) at least partially forming a channel of the transistor (100), a source contact (102) arranged at a first longitudinal end (103) of the nanowire (101), a drain contact (104) arranged at a second longitudinal end (105) of the nanowire (101), and a gate (106) arranged on the nanowire (101) between the source contact (102) and the drain contact (104). Furthermore, a portion of the gate (106) covers, with the interposition of a dielectric material (107), a corresponding portion of the source contact (102) and/or of the drain contact (104) arranged along the nanowire (101) between its two longitudinal ends (103, 105).
ABSTRACT Silicon nanotrees (SiNTrs) have been grown by Chemical Vapor Deposition (CVD) via gold c... more ABSTRACT Silicon nanotrees (SiNTrs) have been grown by Chemical Vapor Deposition (CVD) via gold catalysis and a three steps process: trunks and branches growth are separated by a new gold catalyst deposition. The influence of growth conditions and the second gold catalyst deposition method on SiNTrs morphology are investigated. SiNTrs based electrodes show a capacitive behavior and better capacitance than the corresponding silicon nanowires (SiNWs) electrode. Electrode capacitance is increased up to 9000 mu F cm(-2), i.e. 150 fold higher than for bulk silicon. Micro-supercapacitors with SiNTrs electrodes have a remarkable stability (only 1.2% loses of their initial capacitance after more than one million cycles). The use of an ionic liquid based electrolyte leads to a high maximum power density (around 225 mW cm(-2)) which is competitive with Onion Like Carbon based micro-supercapacitors.
ABSTRACTThe authors present the technological routes used to build planar and vertical gate all-a... more ABSTRACTThe authors present the technological routes used to build planar and vertical gate all-around (GAA) field-effect transistors (FETs) using both Si and SiGe nanowires (NWs) and the electrical performances of the as-obtained components. Planar FETs are characterized in back gate configuration and exhibit good behavior such as an ION/IOFF ratio up to 106. Hysteretic behavior and sub-threshold slope values with respect to surface and oxide interface trap densities are discussed. Vertical devices using Si NWs show good characteristics at the state of the art with ION/IOFF ratio close to 106 and sub-threshold slope around 125 mV/decade while vertical SiGe devices also obtained with the same technological processes, present an ION/IOFF ratio from 103 to 104but with poor dynamics which can be explained by the high interface traps density.
... a CEA Grenoble DRFMC/SP2M/SINAPS Minatec, 17 rue des Martyrs 38054 Grenoble Cedex 9, France. ... more ... a CEA Grenoble DRFMC/SP2M/SINAPS Minatec, 17 rue des Martyrs 38054 Grenoble Cedex 9, France. b UJF Grenoble 1 IUT-1, 17 rue Claude Bernard 38000 Grenoble, France. c CEA DRFMC/SP2M/LEMMA, 17 rue des Martyrs 38054 Grenoble Cedex 9, France. ...
Page 1. Reduced pressure chemical vapour deposition of SiGe virtual substrates for high mobility ... more Page 1. Reduced pressure chemical vapour deposition of SiGe virtual substrates for high mobility devices This article has been downloaded from IOPscience. ... 312 Page 4. Reduced pressure chemical vapour deposition of SiGe virtual substrates for high mobility devices 1 10 100 ...
Physica E: Low-dimensional Systems and Nanostructures, 2009
We have carried out photoluminescence measurements of silicon nanowires (SiNWs) obtained by the c... more We have carried out photoluminescence measurements of silicon nanowires (SiNWs) obtained by the chemical vapor deposition method with a copper-catalyzed vapor–liquid–solid mechanism. The nanowires have a typical diameter of 200nm. Spectrum of the as-grown SiNWs exhibits radiative states below the energy bandgap and a small contribution near the silicon gap energy at 1.08eV. A thermal oxidation allows to decrease the
Highly n-doped silicon nanowires (SiNWs) with several lengths have been deposited via chemical va... more Highly n-doped silicon nanowires (SiNWs) with several lengths have been deposited via chemical vapor deposition on silicon substrate. These nanostructured silicon substrates have been used as electrodes to build symmetrical micro-ultracapacitors. These devices show a quasi-ideal capacitive behavior in organic electrolyte (1 M NEt4BF4 in propylene carbonate). Their capacitance increases with the length of SiNWs on the electrode and has been improved up to 10 μFcm−2 by using 20 μm SiNWs, i.e., ≈10-fold bulk silicon capacitance. This device exhibits promising galvanostatic charge/discharge cycling stability with a maximum power density of 1.4 mW cm−2.
We study by time-resolved low temperature photoluminescence (PL) experiments of the electronic st... more We study by time-resolved low temperature photoluminescence (PL) experiments of the electronic states of silicon nanowires (SiNWs) grown by gold catalyzed chemical vapor deposition and passivated by thermal SiO(2). The typical recombination line of free carriers in gold-catalyzed SiNWs (Au-SiNWs) is identified and studied by time-resolved experiments. We demonstrate that intrinsic Auger recombination governs the recombination dynamic of the dense e-h plasma generated inside the NW. In a few tens of nanoseconds after the pulsed excitation, the density of the initial electronic system rapidly decreases down to reach that of a stable electron-hole liquid phase. The comparison of the PL intensity decay time of Au-SiNWs with high crystalline quality and purity silicon layer allows us to conclude that the Au-SiNW electronic properties are highly comparable to those of bulk silicon crystal.
Silicon nanowires can be prepared with single-crystal structures, diameters as small as several n... more Silicon nanowires can be prepared with single-crystal structures, diameters as small as several nanometers and controllable hole and electron doping, and thus represent powerful building blocks for nanoelectronics devices such as field effect transistors. To explore the potential ...
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