ERMAVSS 2016
Early Reliability Modeling for Aging and Variability in Silicon Systems

Table of Contents

• Preface
  
  

Regular papers

• Design–Reliability Flow and Advanced Models Address IC-Reliability Issues 1-4
  Mohamed Selim, Eric Jeandeau, Cyril Descleves
• Cross-Layer Approaches for an Aging-Aware Design Space Exploration for Microprocessors 5-8
  Fabian Oboril, Mehdi Tahoori
• NBTI Lifetime Evaluation and Extension in Instruction Caches 9-12
  Shengyu Duan, Basel Halak, Rick Wong, Mark Zwolinski
• Approximating Standard Cell Delay Distributions by Reformulating the Most Probable Failure Point 13-16
  Dimitrios Rodopoulos, Philippe Roussel, Francky Catthoor, Yiannakis Sazeides, Dimitrios Soudris
• Reliability-aware design method for CMOS circuits 17-20
  Theodor Hillebrand, Nico Hellwege, Steffen Paul, Dagmar Peters-Drolshagen
• Early failure prediction by using in-situ monitors: Implementation and application results 21-24
  Ahmed Benhassain, Florian Cacho, Vincent Huard, Lorena Anghel
• Ageing Impact on a High Speed Voltage Comparator with Hysteresis 25-29
  Illani Mohd Nawi, Basel Halak, Mark Zwolinski
• Overview of Health Monitoring Techniques for Reliability 30-33
  Abhijit Deb, Bart Vermeulen, Luc van Dijk
• Static Aging Analysis Using 3-Dimensional Delay Library 34-37
  Haider Abbas, Mark Zwolinski, Basel Halak
• Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis 38-40
  Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel
• LPVM: Low-Power Variation-Mitigant Adder Architecture Using Carry Expedition 41-44
  Alireza Namazi, Meisam Abdollahi