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Biagio Cosenza

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Biagio Cosenza

Biagio Cosenza
Associate Professor
Dept. of Computer Science
University of Salerno, Italy

Dipartimento di Informatica
Via Giovanni Paolo II, 132
84084 Fisciano (Salerno), Italy
E-mail: bcosenza at unisa.it
Twitter: @biagiocosenza
Scholar, DBLP, ORCID, SCOPUS

I am an Associate Professor (program AIM: Attraction and International Mobility) at the Department of Computer Science, University of Salerno, Italy.
In 2015-2019, I was Senior Researcher at TU Berlin, working with Prof. Ben Juurlink and leading as PI the DFG-funded international project CELERITY. From 2011 to 2015, I was a Post-Doctoral Researcher at the University of Innsbruck, Austria, working with Prof. Thomas Fahringer, contributing to the Insieme Compiler project and the DK-CIM program at the Scientific Computing multidisciplinary platform.
I received my Ph.D. from the University of Salerno in March 2011, supervised by Prof. Vittorio Scarano. There, I was the recipient of several grants and scholarships (HPC-Europa2, HPC-Europa++, DAAD, Cineca ISCRA) and I visited both the HLRS Supercomputing Center and the University of Stuttgart under the supervision of Prof. Carsten Dachsbacher and by Prof. Thomas Ertl.


My research interests include high-performance computing, compiler technology, and software optimization.

[ long bio | bio lunga | 简历 ] News
中国公派留学的申请
Projects Recent Academic Service Research Highlights by Topic Programming models for HPC. Modern HPC systems are difficult to program. Our research focused on high-level programming models, capable to transparently handle data and task parallelism as well as heterogeneity, and to scale on large-scale compute clusters equipped with GPUs and other accelerators. We proposed CELERITY [Euro-Par19], a C++ SYCL-based programming supported by a distributed runtime system, integrated with a compiler. Under the hood, CELERITY uses two representations for scheduling and optimization: a task graph and a command graph [ICS13].
  • [CCGrid23a] Salzmann, Knorr, Thoman, Gschwandtner, Cosenza, Fahringer An Asynchronous Dataflow-Driven Execution Model For Distributed Accelerator Computing CCGrid 2023
  • [Euro-Par19] Thoman, Salzmann, Cosenza, Fahringer Celerity: High-Level C++ for Accelerator Clusters Euro-Par 2019: 291-303 (acc.rate: 25.3%)
  • [ICS13] Grasso, Pellegrini, Cosenza, Fahringer libwater: Heterogeneous distributed computing made easy ICS 2013: 161-172 (acc.rate: 21%)
Our work on programming models also focuses on the Message Passing Interface (MPI), in particular on integrating modern C++ features into existing message passing implementations. We have proposed EMPI, a high-level modern C++ interface to MPI that exploits modern C++ features to reduce programming errors (type mismatch, invalid argument type, unmatched/mismatched wait) and is competitive with MPI due to its ability to skip some of the runtime checks.
  • [CCGrid23b] Salimi Beni, Crisci, Cosenza EMPI: Enhanced Message Passing Interface in Modern C++ CCGrid 2023
Automatic tuning. Software often exposes parameters that affects performance and other metrics. Parallel programs for modern computer architectures requires the tuning of a large number of code variants. My research focuses on autotuners for parallel optimization, in particular on machine learning approaches integrated into compiler. Examples are classification for automatic task partitioning [ICS13] , regression for GPU frequency scaling [ICPP19] , and ordinal regression for stencil computation [IPDPS17].
  • [ICPP19] Fan, Cosenza, Juurlink. Predictable GPUs Frequency Scaling for Energy and Performance ICPP 2019: 52:1-52:10 (acc.rate: 26.2%)
  • [IPDPS17] Cosenza, Durillo, Ermon, Juurlink. Autotuning Stencil Computations with Structural Ordinal Regression Learning IPDPS 2017: 287-296 (acc.rate: 22%)
  • [ICS13] Kofler, Grasso, Cosenza, Fahringer. An automatic input-sensitive approach for heterogeneous task partitioning ICS 2013: 149-160 (acc.rate: 21%)
Approximate computing. Many applications provide inherent resilience to some amount of error and can potentially trade accuracy for performance. Our research focused on software approaches for approximate computing, such as kernel perforation, and their optimization for GPU architectures [CGO18].
  • [CGO18] Maier, Cosenza, Juurlink. Local Memory-Aware Kernel Perforation CGO 2018: 278-287 (acc.rate: 28.6%)
Vectorization. Modern processors come equipped with Single Instruction Multiple Data (SIMD) instructions. Examples are Intel AVX, ARM NEON, and recent Vector Length Agnostic ISAs such as ARM’s Scalable Vector Extensions (SVE). Our research investigated different aspects of efficient code generation for vectorization, such as cost modeling [MASCOTS19] and control flow [SCOPES18] .
  • [MASCOTS19] Pohl, Cosenza, Juurlink. Portable Cost Modeling for Auto-Vectorizers MASCOTS 2019: 359-369 (acc.rate: 23.8%)
  • [SCOPES18] Pohl, Cosenza, Juurlink. Control Flow Vectorization for ARM NEON SCOPES 2018: 66-75
Visit the publication page for a complete list of publications. Teaching University of Salerno [ time table ]
  • Programmazione Distribuita (AA 2022-23, 2021-22)
  • High Performance Computing (AA 2021-22, 2020-21)
  • Programmazione & Strutture Date (AA 2020-21)
  • Programming Models for Parallel Heterogenous Architectures (CS PhD course, 2020-21)
  • Ad Hoc Networks (AA 2020-21)
TU Berlin
  • Compiler Design (WS 2019-20, WS 2017-18, WS 2016-17, WS 2015-16)
  • Avanced Computer Architecture, lab (SoSe 2018, SoSe 2017, SoSe 2016)
  • AES Seminars (WS 2015, WS 2016, WS 2017, WS 2018)
  • Recent Advances in Computer Architectures (WS 2017-18, WS 2018-19)
University of Innsbruck (courses listed in LFU Online)
[ ISIS Lab | Dept. of Computer Science | University of Salerno ]