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ORCID21st Hot Chips Symposium 2009: Stanford, CA, USA
- 2009 IEEE Hot Chips 21 Symposium (HCS), Stanford, CA, USA, August 23-25, 2009. IEEE 2009, ISBN 978-1-4673-8873-3
- William J. Starke:
POWER7: IBM's next generation, balanced POWER server chip. 1-32 - Chris Lamb:
OpenCL for NVIDIA GPUs. 1-24 - Takumi Maruyama:
SPARC64™ VIIIfx: Fujitsu's new generation octo core processor for PETA scale computing. 1-21 - Lode Lauwers:
Technology scaling at an inflection point what's next? 1-12 - Gideon D. Intrater:
The world's first USB3.0 storage controller. 1-22 - Marc Snir:
Universal parallel computing research center at Illinois. 1-36 - Daniel Kucharski, Luxtera Team:
40Gb/s optical active cable using monolithic transceivers implemented in silicon photonics enabled 0.13-µm SOI CMOS Technology. 1-24 - Mike Houston:
AMD and OpenCL. 1-25 - Paul Chow, Manuel Saldaña, Arun Patel, Christopher A. Madill:
Programming the Nallatech Xeon + multi-FPGA heterogeneous platform. 1-16 - Pat Conway, Nathan Kalyanasundharam, Gregg Donley, Kevin Lepak, Bill Hughes:
Blade computing with the AMD Opteron™ processor ("magny-cours"). 1-19 - Robert J. Safranek:
Intel® QuickPath interconnect overview. 1-27 - Debendra Das Sharma:
Intel® 5520 chipset: An I / O hub chipset for server, workstation, and high end desktop. 1-18 - Peter Alfke:
Xilinx Virtex-6 and Spartan-6 FPGA families. 1-20 - Sailesh Kottapalli, Jeff Baxter:
Nahalem-EX CPU architecture. 1-19 - José Duato:
HyperTransport™ technology tutorial. 1-53 - Kari Pulli:
OpenCL in handheld devices. 1-20 - Shorin Kyo, Shouhei Nomoto, Takuya Koga, Hanno Lieske, Shin'ichiro Okazaki:
IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems. 1-33 - Christos Kozyrakis, Kunle Olukotun:
The stanford pervasive parallelism lab. 1-29 - Colin Osborne, Ralf Karge:
PNX85500 single chip LCD TV system with integrated 120Hz HD frame rate converter. 1-24 - John Birkner:
Ultra low power FPGA fuels faster feature evolution in mobile applications. 1-22 - David Witt:
OMAP4430 architecture and development. 1-16 - Eric Schenk:
Game developer's perspective on OpenCL. 1-44 - Neil Trevett:
Khronos and the OpenCL standard. 1-12 - Ronald N. Kalla, Balaram Sinharoy:
POWER7: IBM's next generation server processor. 1-12 - Dan Mansur:
Newest additions to Altera's integrated transceiver portfolio. 1-18 - David Patterson:
Overview of the UC Berkeley Par Lab. 1-38 - José Duato, Robert J. Safranek, Jasmin Ajanovic:
Tutorial #1: Modern system interconnects. 1-7 - Kevin Leigh:
Innovation envelope: Hot chips in blades. 1-19 - Lawrence Spracklen:
Sun's 3rd generation on-chip UltraSPARC security accelerator. 1-25 - Michael J. Hart:
Technology scaling at an inflexion point: What next? (FPGA perspective). 1-6 - Jasmin Ajanovic:
PCI express 3.0 overview. 1-61 - Aaftab Munshi:
The OpenCL specification. 1-314 - Rajesh Patel:
Moorestown platform: Based on lincroft SoC designed for next generation smartphones. 1-18 - Sanjay Patel:
Rainbow falls sun's next generation CMT processor. 1-19 - Sridhar Pursai:
NVIDIA® Ion. 1-28 - Aaron Partridge, Sassan Tabatabaei:
Silicon MEMS oscillators for high speed digital systems. 1-25 - Lily Pao Looi, Stéphan Jourdan:
Transitioning the Intel® next generation microarchitectures (nehalem and westmere) into the mainstream. 1-18 - Hideaki Kido, Shoji Muramatsu, Yasuhiko Hoshi, Hiroyuki Hamasaki, Atsushi Nakamura, Akihiro Yamamoto:
SoC for car navigation systems with a 53.3 GOPS image recognition engine. 1-22 - Tim Mattson:
OpenCL*, heterogeneous computing, and the CPU. 1-26 - Jen-Hsun Huang:
2009: The GPU computing tipping point. 1-29
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