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ORCID6. IDT 2011: Beirut, Lebanon
- 6th IEEE International Design and Test Workshop, IDT 2011, Beirut, Lebanon, 11-14 December 2011. IEEE 2011, ISBN 978-1-4673-0468-9
- Nima Aghaee
, Zebo Peng, Petru Eles:
Process-variation and temperature aware soc test scheduling using particle swarm optimization. 1-6 - Rabab Ezz-Eldin, Magdy A. El-Moursy, Amr M. Refaat:
Novel Adaptive Virtual Channels technique for NoC switch. 7-11 - Hamid Mushtaq, Zaid Al-Ars, Koen Bertels:
Survey of fault tolerance techniques for shared memory multicore/multiprocessor systems. 12-17 - Kamel Beznia, Ahcène Bounceur, Reinhardt Euler:
Analog performance prediction based on archimedean copulas generation algorithm. 18-23 - Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen:
On modeling and optimizing cost in 3D Stacked-ICs. 24-29 - Mohamed Abbas:
Fault detection and diagnoses methodology for adaptive digitally-calibrated pipelined ADCs. 30-35 - Seyab Khan, Said Hamdioui:
ReverseAge: An online NBTI combating technique using time borrowing. 36-41 - Renato P. Ribas, André Inácio Reis, André Ivanov:
Performance and functional test of flip-flops using ring oscillator structure. 42-47 - Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto:
Validation & Verification of an EDA automated synthesis tool. 48-52 - Layla Hamieh, Nader Mehdi, Ghazalah Omeirat, Ali Chehab, Ayman I. Kayssi:
The effectiveness of delay and IDDT tests in detecting resistive open defects for nanometer CMOS adder circuits. 53-57 - Gursharan Reehal, Mohammed Ismail:
Layout-aware high performance interconnects for Network-on-Chip design in deep nanometer technologies. 58-61 - Stephanie Youssef, Farakh Javid, Damien Dupuis, Ramy Iskander, Marie-Minerve Louërat:
A Python-based layout-aware analog design methodology for nanometric technologies. 62-67 - Rami Fathy Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Haitham Eissa, Mohamed Dessouky, David Nairn, Mohab H. Anis:
An electrical-aware parametric DFM solution for analog circuits. 68-73 - Ahmad Abdulghany, Rami Fathy Salem, Luigi Capodieci, Shobhit Malik:
Yield enhancement flow for analog and full custom designs reliability-rules automatic application. 74-77 - Hassen Aziza, Marc Bocquet, Jean-Michel Portal, Christophe Muller:
Bipolar OxRRAM memory array reliability evaluation based on fault injection. 78-81 - Amir Hossein Gholamipour, Kyprianos Papadimitriou, Fadi J. Kurdahi, Apostolos Dollas, Ahmed M. Eltawil:
Area, reconfiguration delay and reliability trade-offs in designing reliable multi-mode FIR filters. 82-87 - Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Gabriele Tiotto, Paolo Prinetto:
An area-efficient 2-D convolution implementation on FPGA for space applications. 88-92 - Richard Goldman, Vazgen Melikyan, Eduard Babayan:
Digital circuits verification with consideration of destabilizing factors. 93-98 - Khaled Sakr, Mohamed Dessouky, Abd-El Halim Zekry:
Design of tunable continuous-time quadrature bandpass delta-sigma modulators. 99-103 - Muhammad Imran, Zaid Al-Ars, Georgi Gaydadjiev:
4-D parity codes for soft error correction in aerospace applications. 104-109 - Yan Wang, Amine Bermak, Farid Boussaïd:
Reduced dimension Vector Quantization encoding method for image compression. 110-113 - Khaled Mohamed, Alaa B. El-Rouby, Yehea I. Ismail, Hani F. Ragai:
Body contact based TSV equalizer. 114-117 - Tatsuya Koyagi, Sohaib Majzoub, Masahiro Fukui, Resve A. Saleh:
RTL delay macro-modeling with Vt and Vdd variability. 118-123 - Le-Nguyen Tran, Fadi J. Kurdahi, Ahmed M. Eltawil, Abdullah Aljumah:
Adjustable supply voltages and refresh cycle for process variations, temperature changes, and device degradation adaptation in 1T1C embedded DRAM. 124-129
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