default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDISPASS 2015: Philadelphia, PA, USA
- 2015 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2015, Philadelphia, PA, USA, March 29-31, 2015. IEEE Computer Society 2015, ISBN 978-1-4799-1957-4
- Benjamin C. Lee:
Message from the general chair. vi - Jose Renau:
Message from the program chair. vii
Session I: Best Paper Candidates
- Jian Chen, Russell M. Clapp:
Critical-path candidates: scalable performance modeling for MPI workloads. 1-10 - Michael Papamichael, Cagla Cakir, Chen Sun, Chia-Hsin Owen Chen, James C. Hoe, Ken Mai, Li-Shiuan Peh, Vladimir Stojanovic:
DELPHI: a framework for RTL-based architecture design evaluation using DSENT models. 11-20 - Geoffrey Blake, Ali G. Saidi:
Where does the time go? characterizing tail latency in memcached. 21-31 - Sam Van den Steen, Sander De Pestel, Moncef Mechri, Stijn Eyerman, Trevor E. Carlson
, David Black-Schaffer, Erik Hagersten, Lieven Eeckhout:
Micro-architecture independent analytical processor performance and power modeling. 32-41
Session II: Graphs
- Seung-Hwan Lim, Sangkeun Lee, Gautam Ganesh, Tyler C. Brown, Sreenivas R. Sukumar:
Graph Processing Platforms at Scale: Practices and Experiences. 42-51 - Charles Yount, Harish Patil, Mohammad S. Islam, Aditya Srikanth:
Graph-matching-based simulation-region selection for multiple binaries. 52-61
Session III: Sampling
- Xiaoyue Pan, Bengt Jonsson:
A modeling framework for reuse distance-based estimation of cache performance. 62-71 - Adam N. Jacobvitz, Andrew D. Hilton, Daniel J. Sorin:
Multi-program benchmark definition. 72-82 - Bin Li, Shaoming Chen, Lu Peng:
Precise computer comparisons via statistical resampling methods. 83-92
Session IV: Operating Systems
- Hu-Qiu Liu, Jia-Ju Bai, Yu-Ping Wang, Zhe Bian, Shi-Min Hu:
Pairminer: mining for paired functions in Kernel extensions. 93-101 - Vincent M. Weaver:
Self-monitoring overhead of the Linux perf_ event performance counter interface. 102-111 - Andrzej Nowak, David Levinthal, Willy Zwaenepoel:
Hierarchical cycle accounting: a new method for application performance tuning. 112-123
Session V: Insights
- Stijn Eyerman, Pierre Michaud, Wouter Rogiest:
Revisiting symbiotic job scheduling. 124-134 - Sander De Pestel, Stijn Eyerman, Lieven Eeckhout:
Micro-architecture independent branch behavior characterization. 135-144 - Amro Awad, Brett Kettering, Yan Solihin:
Non-volatile memory host controller interface performance analysis in high-performance I/O systems. 145-154
Poster Session
- Kothiya Mayank, Hongwen Dai, Jizeng Wei, Huiyang Zhou:
Analyzing graphics processor unit (GPU) instruction set architectures. 155-156 - Yu-Ting Chen, Jason Cong, Bingjun Xiao:
ARACompiler: a prototyping flow and evaluation framework for accelerator-rich architectures. 157-158 - Dipti Shankar, Xiaoyi Lu, Jithin Jose, Md. Wasi-ur-Rahman, Nusrat S. Islam, Dhabaleswar K. Panda:
Can RDMA benefit online data processing workloads on memcached and MySQL? 159-160 - Keitaro Oka, Wenhao Jia, Margaret Martonosi, Koji Inoue:
Characterization and cross-platform analysis of high-throughput accelerators. 161-162 - Robert Smolinski, Rakesh Komuravelli, Hyojin Sung, Sarita V. Adve:
Eliminating on-chip traffic waste: are we there yet? 163-164 - Lipeng Wan, Qing Cao, Wenjun Zhou:
Estimation-based profiling for code placement optimization in sensor network programs. 165-166 - Junjie Qian, Du Li, Witawas Srisa-an, Hong Jiang, Sharad C. Seth:
Factors affecting scalability of multithreaded Java applications on manycore systems. 167-168 - Michael Andersch, Jan Lucas, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
On latency in GPU throughput microarchitectures. 169-170 - Wes Felter, Alexandre Ferreira, Ram Rajamony, Juan Rubio:
An updated performance comparison of virtual machines and Linux containers. 171-172
Session VI: Synthesizable and GPUs
- Jeff Bush, Philip Dexter, Timothy N. Miller, Aaron Carpenter:
Nyami: a synthesizable GPU architectural model for general-purpose and graphics-specific workloads. 173-182 - Myung Kuk Yoon, Yunho Oh, Sangpil Lee, Seung-Hun Kim, Deokho Kim, Won Woo Ro:
DRAW: investigating benefits of adaptive fetch group size on GPU. 183-192 - Gadi Oxman, Shlomo Weiss:
DNOC: an accurate and fast virtual channel and deflection routing network-on-chip simulator. 193-202 - Chen-Han Ho, Venkatraman Govindaraju, Tony Nowatzki, Ranjini Nagaraju, Zachary Marzec, Preeti Agarwal, Chris Frericks, Ryan Cofell, Karthikeyan Sankaralingam:
Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation. 203-214
Session VII: Mobile
- Matthew Halpern, Yuhao Zhu, Ramesh Peri, Vijay Janapa Reddi:
Mosaic: cross-platform user-interaction record and replay for the fragmented android ecosystem. 215-224 - Cao Gao, Anthony Gutierrez, Madhav Rajan, Ronald G. Dreslinski, Trevor N. Mudge, Carole-Jean Wu:
A study of mobile device utilization. 225-234 - René de Jong, Andreas Hansson:
A full-system approach to analyze the impact of next-generation mobile flash storage. 235-244
Session VIII: Emulation/Simulation
- Xin Tong, Andreas Moshovos:
QTrace: a framework for customizable full system instrumentation. 245-255 - Derek Lockhart, Berkin Ilbeyi, Christopher Batten:
Pydgin: generating fast instruction set simulators from simple architecture descriptions with meta-tracing JIT compilers. 256-267 - Michael Moeng, Alex K. Jones, Rami G. Melhem:
Reciprocal abstraction for computer architecture co-simulation. 268-277 - Siddharth Nilakantan, Karthik Sangaiah, Ankit More, Giordano Salvador, Baris Taskin, Mark Hempstead:
Synchrotrace: synchronization-aware architecture-agnostic traces for light-weight multicore simulation. 278-287
Session IX: Real Hardware
- Diana R. Guttman, Mahmut T. Kandemir, Meenakshi Arunachalam, Vlad Calina:
Performance and energy evaluation of data prefetching on intel Xeon Phi. 288-297 - Yipeng Wang, Yan Solihin:
Emulating cache organizations on real hardware using performance cloning. 298-307 - Gokcen Kestor, Roberto Gioiosa, Daniel G. Chavarría-Miranda:
Prometheus: scalable and accurate emulation of task-based applications on many-core systems. 308-317 - Benjamin Klenk, Lena Oden, Holger Fröning:
Analyzing communication models for distributed thread-collaborative processors in terms of energy and time. 318-327 - Zacharias Hadjilambrou, Marios Kleanthous, Yanos Sazeides:
Characterization and analysis of a web search benchmark. 328-337
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-02-04 20:47 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
