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ORCIDAnatolij Sergiyenko
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- affiliation: National Technical University of Ukraine, Kiev
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2010 – 2019
- 2016
[j1]Anatolij Sergiyenko
, Anastasia Serhienko:
Modules for Pipelined Mixed Radix FFT Processors. Int. J. Reconfigurable Comput. 2016: 3561317:1-3561317:7 (2016)
2000 – 2009
- 2009
- [c9]Anatolij Sergiyenko, Oleg Maslennikow, Piotr Ratuszniak, Natalia Maslennikowa, Adam Tomas:
Application Specific Processors for the Autoregressive Signal Analysis. PPAM (1) 2009: 80-86 - 2007
- [c8]Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko, Adam Tomas, Roman Wyrzykowski:
Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor. PPAM 2007: 137-147 - 2006
- [c7]Oleg Maslennikow, Anatoli Sergyienko:
Mapping DSP Algorithms into FPGA. PARELEC 2006: 208-213 - 2005
- [c6]Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko:
FPGA Implementation of the Conjugate Gradient Method. PPAM 2005: 526-533 - 2003
- [c5]Oleg Maslennikow, Juri Shevtshenko, Anatoli Sergyienko:
Configurable Microprocessor Array for DSP Applications. PPAM 2003: 36-41 - 2002
- [c4]Oleg Maslennikov, Juri Shevtshenko, Anatoli Sergyienko:
Configurable Microcontroller Array. PARELEC 2002: 47-49 - 2001
- [c3]Anatoli Sergyienko, Oleg Maslennikov:
Implementation of Givens QR-Decomposition in FPGA. PPAM 2001: 458-465
1990 – 1999
- 1998
- [c2]Anatoli Sergyienko, Juri Kanevski, Oleg Maslennikov, Roman Wyrzykowski:
A Method for Mapping DSP Algorithms into Application Specific Structures. EUROMICRO 1998: 10365- - 1996
- [c1]Juri Kanevski, Oleg Maslennikov, Anatoli Sergyienko:
Processor Array for Signal Computing and Numerical Applications. Parcella 1996: 47-58
Coauthor Index
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