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2020 – today
- 2024
[j36]Doron Drusinsky
:
From P Versus NP to Probabilistic and Zero Knowledge Proof Systems. Computer 57(4): 119-130 (2024)- [j35]Matthew Litton, Doron Drusinsky, London Bridget, James Bret Michael:
Machine-Learned Correctness Properties, Runtime Verification, and Advance-Warning Oracles for Autonomous Systems. Computer 57(10): 118-130 (2024) - [i1]Matthew Litton, Doron Drusinsky, James Bret Michael:
Discovering Decision Manifolds to Assure Trusted Autonomous Systems. CoRR abs/2402.07791 (2024) - 2023
- [j34]Doron Drusinsky:
Encrypting for Time- and/or Location-Based Decryption. Computer 56(1): 102-110 (2023) - [j33]Doron Drusinsky, Matthew Litton, James Bret Michael:
Machine-Learned Verification and Advance Notice Oracles for Autonomous Systems. Computer 56(7): 121-130 (2023) - 2022
- [j32]Doron Drusinsky:
On the High-Energy Consumption of Bitcoin Mining. Computer 55(1): 88-93 (2022) - [j31]Doron Drusinsky, Matthew Litton, James Bret Michael:
Lightweight Verification and Validation of Cyberphysical Systems Using Machine-Learned Correctness Properties. Computer 55(2): 102-108 (2022) - [j30]Doron Drusinsky:
Cryptographic-Biometric Self-Sovereign Personal Identities. Computer 55(6): 96-102 (2022) - [c30]Doron Drusinsky, James Bret Michael, Matthew Litton:
Machine-Learned Specifications for the Verification and Validation of Autonomous Cyberphysical Systems. ISSRE Workshops 2022: 333-341 - 2021
- [j29]Doron Drusinsky:
Who Is Authenticating My E-Commerce Logins? Computer 54(4): 49-54 (2021) - [j28]Doron Drusinsky, James Bret Michael:
Multiagent Pathfinding Under Rigid, Optimization, and Uncertainty Constraints. Computer 54(7): 111-118 (2021) - [j27]James Bret Michael, Doron Drusinsky, Duminda Wijesekera:
Formal Verification of Cyberphysical Systems. Computer 54(9): 15-24 (2021) - [j26]James Bret Michael, Doron Drusinsky, Duminda Wijesekera:
Formal Methods in Cyberphysical Systems. Computer 54(9): 25-29 (2021) - 2020
- [j25]Doron Drusinsky, James Bret Michael:
Obtaining Trust in Executable Derivatives Using Crowdsourced Critiques With Blind Signatures. Computer 53(4): 51-56 (2020) - [j24]James Bret Michael, George W. Dinolt, Doron Drusinsky:
Open Questions in Formal Methods. Computer 53(5): 81-84 (2020)
2010 – 2019
- 2017
- [j23]Doron Drusinsky:
Online, library-based visual formal specification monitoring system for monitoring log-files with visible and hidden data. Innov. Syst. Softw. Eng. 13(1): 67-79 (2017) - [j22]Doron Drusinsky:
Reverse engineering concurrent UML state machines using black box testing and genetic programming. Innov. Syst. Softw. Eng. 13(2-3): 117-128 (2017) - 2016
- [j21]Doron Drusinsky:
Run-time monitoring using bounded constraint instance discovery within big data streams. Innov. Syst. Softw. Eng. 12(2): 141-151 (2016) - 2015
- [j20]Doron Drusinsky:
Early detection of evolving system failures and temporal conflicts using parameterized formal specifications and bounded constraint-solving. Innov. Syst. Softw. Eng. 11(2): 143-152 (2015) - 2014
- [j19]Doron Drusinsky:
Runtime monitoring and verification of systems with hidden information. Innov. Syst. Softw. Eng. 10(2): 123-136 (2014) - [j18]Doron Drusinsky:
Computer-aided discovery of formal specification behavioral requirements and requirement to implementation mappings. Innov. Syst. Softw. Eng. 10(4): 271-281 (2014) - [j17]Michael A. Schumann, Doron Drusinsky, James Bret Michael, Duminda Wijesekera:
Modeling Human-in-the-Loop Security Analysis and Decision-Making Processes. IEEE Trans. Software Eng. 40(2): 154-166 (2014) - 2013
- [j16]Doron Drusinsky:
Behavioral and Temporal Rule Checking for Gaussian Random Process - a Kalman Filter Example. J. Univers. Comput. Sci. 19(15): 2198-2206 (2013) - [j15]Miriam C. Bergue Alves, Doron Drusinsky, James Bret Michael, Man-tak Shing:
End-to-End Formal Specification, Validation, and Verification Process: A Case Study of Space Flight Software. IEEE Syst. J. 7(4): 632-641 (2013) - 2012
- [j14]Doron Drusinsky:
Behavioral and Temporal Pattern Detection within Financial Data with Hidden Information. J. Univers. Comput. Sci. 18(14): 1950-1966 (2012) - [j13]Doron Drusinsky, Man-tak Shing:
Validating quality attribute requirements via execution-based model checking. Softw. Pract. Exp. 42(7): 853-875 (2012) - [c29]Doron Drusinsky:
Runtime Verification of Systems with Hidden Information. Infotech@Aerospace 2012 - 2011
- [j12]James Bret Michael, Doron Drusinsky, Thomas W. Otani, Man-tak Shing:
Verification and Validation for Trustworthy Software Systems. IEEE Softw. 28(6): 86-92 (2011) - [c28]Doron Drusinsky, J. Bret Michael, Man-tak Shing:
Rapid runtime system verification using automatic source code instrumentation. SoSE 2011: 1-6 - [c27]Doron Drusinsky, J. Bret Michael, Thomas W. Otani, Man-tak Shing:
Putting order into the cloud: Object-oriented UML-based enforcement for document and application organization. SoSE 2011: 119-124 - [c26]Miriam C. Bergue Alves, Doron Drusinsky, J. Bret Michael, Man-tak Shing:
Formal validation and verification of space flight software using statechart-assertions and runtime execution monitoring. SoSE 2011: 155-160 - 2010
- [c25]Kevin D. Foster, John J. Shea, Doron Drusinsky, James Bret Michael, Thomas W. Otani, Man-tak Shing:
Removing the Boundaries: Steps Toward a Cloud Nirvana. GrC 2010: 167-171 - [c24]Doron Drusinsky, Man-tak Shing:
Validating quality attribute requirements via execution-based model checking. International Symposium on Rapid System Prototyping 2010: 1-7
2000 – 2009
- 2009
- [c23]Doron Drusinsky, Man-tak Shing:
Using UML Statecharts with Knowledge Logic Guards. MoDELS 2009: 586-590 - [c22]Doron Drusinsky:
Guarding the guard: Using meta formal specifications to guard assertions. SoSE 2009: 1-5 - [c21]Doron Drusinsky:
TLtoSQL: Rapid post-mortem verification using temporal logic to SQL code generation in the Eclipse PDE. SoSE 2009: 1-5 - 2008
- [j11]Doron Drusinsky, James Bret Michael, Man-tak Shing:
A framework for computer-aided validation. Innov. Syst. Softw. Eng. 4(2): 161-168 (2008) - [j10]Doron Drusinsky, James Bret Michael, Man-tak Shing:
A Visual Tradeoff Space for Formal Verification and Validation Techniques. IEEE Syst. J. 2(4): 513-519 (2008) - [c20]Doron Drusinsky, James Bret Michael, Thomas W. Otani, Man-tak Shing:
Validating UML Statechart-Based Assertions Libraries for Improved Reliability and Assurance. SSIRI 2008: 47-51 - [c19]Doron Drusinsky:
From UML activity diagrams to specification requirements. SoSE 2008: 1-5 - [c18]Doron Drusinsky, James Bret Michael, Thomas W. Otani, Man-tak Shing:
Integrating statechart assertions into Java components using AspectJ. SoSE 2008: 1-7 - 2007
- [j9]Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir:
Creating and Validating Embedded Assertion Statecharts. IEEE Distributed Syst. Online 8(5) (2007) - [c17]Thomas W. Otani, Mikhail Auguston, Thomas S. Cook, Doron Drusinsky, James Bret Michael, Man-tak Shing:
A design pattern for using non-developmental items in real-time Java. JTRES 2007: 135-143 - [c16]Doron Drusinsky, Man-tak Shing:
Verifying Distributed Protocols using MSC-Assertions, Run-time Monitoring, and Automatic Test Generation. IEEE International Workshop on Rapid System Prototyping 2007: 82-88 - [c15]Thomas S. Cook, Doron Drusinsky, Man-tak Shing:
Specification, Validation and Run-time Monitoring of SOA Based System-of-Systems Temporal Behaviors. SoSE 2007: 1-6 - 2006
- [b1]Doron Drusinsky:
Modeling and verification using UML statecharts - a working guide to reactive system design, runtime monitoring and execution-based model checking. Elsevier 2006, ISBN 978-0-7506-7949-7, pp. I-XII, 1-306 - [j8]Doron Drusinsky:
On-line Monitoring of Metric Temporal Logic with Time-Series Constraints Using Alternating Finite Automata. J. Univers. Comput. Sci. 12(5): 482-498 (2006) - [c14]Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir:
Creation and Validation of Embedded Assertion Statecharts. IEEE International Workshop on Rapid System Prototyping 2006: 17-23 - [c13]Man-tak Shing, Doron Drusinsky, Thomas S. Cook:
Quality assurance of the timing properties of real-time, reactive system-of-systems. SoSE 2006: 1-6 - 2005
- [c12]Man-tak Shing, Doron Drusinsky:
Architectural Design, Behavior Modeling and Run-Time Verification of Network Embedded Systems. Monterey Workshop 2005: 281-303 - [c11]Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir:
Test-Time, Run-Time, and Simulation-Time Temporal Assertions in RSP. IEEE International Workshop on Rapid System Prototyping 2005: 105-110 - [c10]Doron Drusinsky, Man-tak Shing:
Creation and evaluation of formal specifications for system-of-systems development. SMC 2005: 1864-1869 - 2004
- [j7]Guillaume P. Brat, Doron Drusinsky, Dimitra Giannakopoulou, Allen Goldberg, Klaus Havelund, Michael R. Lowry, Corina S. Pasareanu, Arnaud Venet, Willem Visser, Richard Washington:
Experimental Evaluation of Verification and Validation Tools on Martian Rover Software. Formal Methods Syst. Des. 25(2-3): 167-198 (2004) - [c9]Doron Drusinsky:
Automatic Simulation of Network Problems in UDP-Based Java Programs Temporal Logic and Natural Language Conditioned Transitions. IPDPS 2004 - [c8]Doron Drusinsky, Man-tak Shing:
TLCharts: Armor-plating Harel Statecharts with Temporal Logic Conditions. IEEE International Workshop on Rapid System Prototyping 2004: 29-36 - [c7]Doron Drusinsky:
Semantics and Runtime Monitoring of TLCharts: Statechart Automata with Temporal Logic Conditioned Transitions. RV@ETAPS 2004: 3-21 - 2003
- [j6]Doron Drusinsky, Man-tak Shing:
Monitoring Temporal Logic Specifications Combined with Time Series Constraints. J. Univers. Comput. Sci. 9(11): 1261-1276 (2003) - [c6]Cyrille Artho, Doron Drusinsky, Allen Goldberg, Klaus Havelund, Michael R. Lowry, Corina S. Pasareanu, Grigore Rosu, Willem Visser:
Experiments with Test Case Generation and Runtime Analysis. Abstract State Machines 2003: 87-107 - [c5]Doron Drusinsky:
Monitoring Temporal Rules Combined with Time Series. CAV 2003: 114-117 - [c4]Doron Drusinsky, Man-tak Shing:
Verification of Timing Properties in Rapid System Prototyping. IEEE International Workshop on Rapid System Prototyping 2003: 47- - [c3]Doron Drusinsky, Garth Watney:
Applying Run-Time Monitoring to the Deep-Impact Fault Protection Engine. SEW 2003: 127 - 2000
- [c2]Doron Drusinsky:
The Temporal Rover and the ATG Rover. SPIN 2000: 323-330
1990 – 1999
- 1994
- [j5]Doron Drusinsky, David Harel:
On the Power of Bounded Concurrency I: Finite Automata. J. ACM 41(3): 517-539 (1994) - 1991
- [j4]Doron Drusinsky-Yoresh:
A state assignment procedure for single-block implementation of state charts. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(12): 1569-1576 (1991) - [j3]Doron Drusinsky-Yoresh:
Decision problems for interacting finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(12): 1576-1579 (1991) - 1990
- [j2]Doron Drusinsky-Yoresh:
Symbolic cover minimization of fully I/O specified finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(7): 779-781 (1990)
1980 – 1989
- 1989
- [j1]Doron Drusinsky, David Harel:
Using statecharts for hardware description and synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(7): 798-807 (1989) - 1988
- [c1]Doron Drusinsky, David Harel:
On the Power of Cooperative Concurrency. Concurrency 1988: 74-103
Coauthor Index
aka: J. Bret Michael
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last updated on 2024-10-23 20:32 CEST by the dblp team
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