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ORCIDGrace Li Zhang
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- affiliation: Technical University of Munich, Chair of Electronic Design Automation, Germany
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2020 – today
- 2024
[j11]Amro Eldebiky
, Grace Li Zhang, Georg Böcherer, Bing Li, Ulf Schlichtmann:
CorrectNet+: Dealing With HW Non-Idealities in In-Memory-Computing Platforms by Error Suppression and Compensation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(2): 573-585 (2024)- [j10]Bowen Zhang, Huaxi Gu, Grace Li Zhang, Yintang Yang, Ziteng Ma, Ulf Schlichtmann:
A 3D Hybrid Optical-Electrical NoC Using Novel Mapping Strategy Based DCNN Dataflow Acceleration. IEEE Trans. Parallel Distributed Syst. 35(7): 1139-1154 (2024) - [c39]Jingcun Wang, Bing Li, Grace Li Zhang:
Early-Exit with Class Exclusion for Efficient Inference of Neural Networks. AICAS 2024: 263-267 - [c38]Kangwei Xu, Grace Li Zhang, Ulf Schlichtmann, Bing Li:
Logic Design of Neural Networks for High-Throughput and Low-Power Applications. ASPDAC 2024: 902-907 - [c37]Chuangtao Chen, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li:
Computational and Storage Efficient Quadratic Neurons for Deep Neural Networks. DATE 2024: 1-6 - [c36]Qingrong Huang, Hamza Errahmouni Barkam, Zeyu Yang, Jianyi Yang, Thomas Kämpfe, Kai Ni, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Mohsen Imani, Cheng Zhuo, Xunzhao Yin:
A FeFET-based Time-Domain Associative Memory for Multi-bit Similarity Computation. DATE 2024: 1-6 - [c35]Tarik Ibrahimpasic, Grace Li Zhang, Michaela Brunner, Georg Sigl, Bing Li, Ulf Schlichtmann:
ScanCamouflage: Obfuscating Scan Chains with Camouflaged Sequential and Logic Gates. DATE 2024: 1-2 - [c34]Mengnan Jiang, Jingcun Wang, Amro Eldebiky, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Grace Li Zhang:
Class-Aware Pruning for Efficient Neural Networks. DATE 2024: 1-6 - [c33]Ruidi Qiu, Amro Eldebiky, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li:
OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation. DATE 2024: 1-6 - [c32]Kangwei Xu, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li:
Automated C/C++ Program Repair for High-Level Synthesis via Large Language Models. MLCAD 2024: 15:1-15:9 - [c31]Ruidi Qiu, Grace Li Zhang, Rolf Drechsler, Ulf Schlichtmann, Bing Li:
AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design. MLCAD 2024: 18:1-18:10 - [i24]Bo Liu, Grace Li Zhang, Xunzhao Yin, Ulf Schlichtmann, Bing Li:
EncodingNet: A Novel Encoding-based MAC Design for Efficient Neural Network Acceleration. CoRR abs/2402.18595 (2024) - [i23]Chuangtao Chen, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li:
LiveMind: Low-latency Large Language Models with Simultaneous Inference. CoRR abs/2406.14319 (2024) - [i22]Amro Eldebiky, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Ulf Schlichtmann, Bing Li:
BasisN: Reprogramming-Free RRAM-Based In-Memory-Computing by Basis Combination for Deep Neural Networks. CoRR abs/2407.03738 (2024) - [i21]Kangwei Xu, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li:
Automated C/C++ Program Repair for High-Level Synthesis via Large Language Models. CoRR abs/2407.03889 (2024) - [i20]Ruidi Qiu, Grace Li Zhang, Rolf Drechsler, Ulf Schlichtmann, Bing Li:
AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design. CoRR abs/2407.03891 (2024) - [i19]Wenhao Sun, Bing Li, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann:
Classification-Based Automatic HDL Code Generation Using LLMs. CoRR abs/2407.18326 (2024) - [i18]Sijie Fei, Amro Eldebiky, Grace Li Zhang, Bing Li, Ulf Schlichtmann:
An Efficient General-Purpose Optical Accelerator for Neural Networks. CoRR abs/2409.12966 (2024) - [i17]Jingcun Wang, Yu-Guang Chen, Ing-Chao Lin, Bing Li, Grace Li Zhang:
Basis Sharing: Cross-Layer Parameter Sharing for Large Language Model Compression. CoRR abs/2410.03765 (2024) - [i16]Kangwei Xu, Ruidi Qiu, Zhuorui Zhao, Grace Li Zhang, Ulf Schlichtmann, Bing Li:
LLM-Aided Efficient Hardware Design Automation. CoRR abs/2410.18582 (2024) - 2023
- [j9]Tinghuan Chen, Grace Li Zhang, Bei Yu, Bing Li, Ulf Schlichtmann:
Machine Learning in Advanced IC Design: A Methodological Survey. IEEE Des. Test 40(1): 17-33 (2023) - [j8]Xunzhao Yin, Yu Qian, Mohsen Imani, Kai Ni, Chao Li, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo:
Ferroelectric Ternary Content Addressable Memories for Energy-Efficient Associative Search. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1099-1112 (2023) - [j7]Di Gao, Zeyu Yang, Qingrong Huang, Grace Li Zhang, Xunzhao Yin, Bing Li, Ulf Schlichtmann, Cheng Zhuo:
BRoCoM: A Bayesian Framework for Robust Computing on Memristor Crossbar. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2136-2148 (2023) - [c30]Richard Petri, Grace Li Zhang, Yiran Chen, Ulf Schlichtmann, Bing Li:
PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Acceleration. DAC 2023: 1-6 - [c29]Amro Eldebiky, Grace Li Zhang, Georg Böcherer, Bing Li, Ulf Schlichtmann:
CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensation. DATE 2023: 1-6 - [c28]Amro Eldebiky, Grace Li Zhang, Bing Li:
Countering Uncertainties in In-Memory-Computing Platforms with Statistical Training, Accuracy Compensation and Recursive Test. DATE 2023: 1-6 - [c27]Wenhao Sun, Grace Li Zhang, Huaxi Gu, Bing Li, Ulf Schlichtmann:
Class-based Quantization for Neural Networks. DATE 2023: 1-6 - [c26]Wenhao Sun, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Bing Li, Ulf Schlichtmann:
SteppingNet: A Stepping Neural Network with Incremental Accuracy Enhancement. DATE 2023: 1-6 - [c25]Wei-Lun Chen, Fang-Yi Gu, Ing-Chao Lin, Grace Li Zhang, Bing Li, Ulf Schlichtmann:
A Novel and Efficient Block-Based Programming for ReRAM-Based Neuromorphic Computing. ICCAD 2023: 1-9 - [c24]Amro Eldebiky, Bing Li, Grace Li Zhang:
NearUni: Near-Unitary Training for Efficient Optical Neural Networks. ICCAD 2023: 1-8 - [i15]Richard Petri, Grace Li Zhang, Yiran Chen, Ulf Schlichtmann, Bing Li:
PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Acceleration. CoRR abs/2303.13997 (2023) - [i14]Chuangtao Chen, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li:
Expressivity Enhancement with Efficient Quadratic Neurons for Convolutional Neural Networks. CoRR abs/2306.07294 (2023) - [i13]Kangwei Xu, Grace Li Zhang, Ulf Schlichtmann, Bing Li:
Logic Design of Neural Networks for High-Throughput and Low-Power Applications. CoRR abs/2309.10510 (2023) - [i12]Jingcun Wang, Bing Li, Grace Li Zhang:
Early Classification for Dynamic Inference of Neural Networks. CoRR abs/2309.13443 (2023) - [i11]Ruidi Qiu, Amro Eldebiky, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li:
OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation. CoRR abs/2312.01403 (2023) - [i10]Mengnan Jiang, Jingcun Wang, Amro Eldebiky, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Grace Li Zhang:
Class-Aware Pruning for Efficient Neural Networks. CoRR abs/2312.05875 (2023) - 2022
- [j6]Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann:
PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2185-2198 (2022) - [j5]Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann:
VirtualSync+: Timing Optimization With Virtual Synchronization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5526-5540 (2022) - [c23]Jiahao Cai, Mohsen Imani, Kai Ni, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo, Xunzhao Yin:
Energy efficient data search design and optimization based on a compact ferroelectric FET content addressable memory. DAC 2022: 751-756 - [c22]Grace Li Zhang, Shuhang Zhang, Hai Helen Li, Ulf Schlichtmann:
RRAM-based Neuromorphic Computing: Data Representation, Architecture, Logic, and Programming. DSD 2022: 423-428 - [c21]Wenwen Ye, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo, Xunzhao Yin:
Aging Aware Retraining for Memristor-based Neuromorphic Computing. ISCAS 2022: 3294-3298 - [i9]Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann:
VirtualSync+: Timing Optimization with Virtual Synchronization. CoRR abs/2203.05516 (2022) - [i8]Amro Eldebiky, Grace Li Zhang, Georg Böcherer, Bing Li, Ulf Schlichtmann:
CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensation. CoRR abs/2211.14917 (2022) - [i7]Wenhao Sun, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Bing Li, Ulf Schlichtmann:
SteppingNet: A Stepping Neural Network with Incremental Accuracy Enhancement. CoRR abs/2211.14926 (2022) - [i6]Wenhao Sun, Grace Li Zhang, Huaxi Gu, Bing Li, Ulf Schlichtmann:
Class-based Quantization for Neural Networks. CoRR abs/2211.14928 (2022) - 2021
- [j4]Chuliang Guo, Li Zhang, Xian Zhou, Grace Li Zhang, Bing Li, Weikang Qian, Xunzhao Yin, Cheng Zhuo:
A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths. ACM J. Emerg. Technol. Comput. Syst. 17(4): 48:1-48:16 (2021) - [c20]Grace Li Zhang, Bing Li, Ying Zhu, Tianchen Wang, Yiyu Shi, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Tsung-Yi Ho, Ulf Schlichtmann:
Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks. ASP-DAC 2021: 853-858 - [c19]Di Gao, Qingrong Huang, Grace Li Zhang, Xunzhao Yin, Bing Li, Ulf Schlichtmann, Cheng Zhuo:
Bayesian Inference Based Robust Computing on Memristor Crossbar. DAC 2021: 121-126 - [c18]Jingyao Zhang, Huaxi Gu, Grace Li Zhang, Bing Li, Ulf Schlichtmann:
Hardware-Software Codesign of Weight Reshaping and Systolic Array Multiplexing for Efficient CNNs. DATE 2021: 667-672 - [c17]Grace Li Zhang, Bing Li, Xing Huang, Chen Shen, Shuhang Zhang, Florin Burcea, Helmut Graeb, Tsung-Yi Ho, Hai Li, Ulf Schlichtmann:
An Efficient Programming Framework for Memristor-based Neuromorphic Computing. DATE 2021: 1068-1073 - [c16]Yu Qian, Zhenhao Fan, Haoran Wang, Chao Li, Mohsen Imani, Kai Ni, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo, Xunzhao Yin:
Energy-Aware Designs of Ferroelectric Ternary Content Addressable Memory. DATE 2021: 1090-1095 - [c15]Di Gao, Grace Li Zhang, Xunzhao Yin, Bing Li, Ulf Schlichtmann, Cheng Zhuo:
Reliable Memristor-based Neuromorphic Design Using Variation- and Defect-Aware Training. ICCAD 2021: 1-9 - 2020
- [j3]Grace Li Zhang, Bing Li, Meng Li, Bei Yu, David Z. Pan, Michaela Brunner, Georg Sigl, Ulf Schlichtmann:
TimingCamouflage+: Netlist Security Enhancement With Unconventional Timing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4482-4495 (2020) - [c14]Shuhang Zhang, Grace Li Zhang, Bing Li, Hai Helen Li, Ulf Schlichtmann:
Lifetime Enhancement for RRAM-based Computing-In-Memory Engine Considering Aging and Thermal Effects. AICAS 2020: 11-15 - [c13]Grace Li Zhang, Michaela Brunner, Bing Li, Georg Sigl, Ulf Schlichtmann:
Timing Resilience for Efficient and Secure Circuits. ASP-DAC 2020: 623-628 - [c12]Ying Zhu, Grace Li Zhang, Tianchen Wang, Bing Li, Yiyu Shi, Tsung-Yi Ho, Ulf Schlichtmann:
Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise. DATE 2020: 1590-1593 - [c11]Grace Li Zhang, Bing Li, Ying Zhu, Shuhang Zhang, Tianchen Wang, Yiyu Shi, Tsung-Yi Ho, Hai (Helen) Li, Ulf Schlichtmann:
Reliable and Robust RRAM-based Neuromorphic Computing. ACM Great Lakes Symposium on VLSI 2020: 33-38 - [c10]Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann:
PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips. ICCAD 2020: 29:1-29:8 - [c9]Ying Zhu, Grace Li Zhang, Bing Li, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Tsung-Yi Ho, Ulf Schlichtmann:
Countering Variations and Thermal Effects for Accurate Optical Neural Networks. ICCAD 2020: 152:1-152:7 - [i5]Grace Li Zhang, Bing Li, Meng Li, Bei Yu, David Z. Pan, Michaela Brunner, Georg Sigl, Ulf Schlichtmann:
TimingCamouflage+: Netlist Security Enhancement with Unconventional Timing (with Appendix). CoRR abs/2003.00862 (2020)
2010 – 2019
- 2019
- [j2]Grace Li Zhang, Bing Li, Yiyu Shi, Jiang Hu, Ulf Schlichtmann:
EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration Under Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(4): 705-718 (2019) - [c8]Shuhang Zhang, Grace Li Zhang, Bing Li, Hai Helen Li, Ulf Schlichtmann:
Aging-aware Lifetime Enhancement for Memristor-based Neuromorphic Computing. DATE 2019: 1751-1756 - 2018
- [j1]Grace Li Zhang, Bing Li, Jinglan Liu, Yiyu Shi, Ulf Schlichtmann:
Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(2): 392-405 (2018) - [c7]Grace Li Zhang, Bing Li, Masanori Hashimoto, Ulf Schlichtmann:
Virtualsync: timing optimization by synchronizing logic waves with sequential and combinational components as delay units. DAC 2018: 26:1-26:6 - [c6]Grace Li Zhang, Bing Li, Bei Yu, David Z. Pan, Ulf Schlichtmann:
TimingCamouflage: Improving circuit security against counterfeiting by unconventional timing. DATE 2018: 91-96 - [c5]Grace Li Zhang, Bing Li, Ulf Schlichtmann:
Timing with Virtual Signal Synchronization for Circuit Performance and Netlist Security. ISVLSI 2018: 715-718 - 2017
- [c4]Baris Yigit, Grace Li Zhang, Bing Li, Yiyu Shi, Ulf Schlichtmann:
Application of machine learning methods in post-silicon yield improvement. SoCC 2017: 243-248 - [i4]Grace Li Zhang, Bing Li, Ulf Schlichtmann:
Sampling-based Buffer Insertion for Post-Silicon Yield Improvement under Process Variability. CoRR abs/1705.04990 (2017) - [i3]Grace Li Zhang, Bing Li, Ulf Schlichtmann:
EffiTest: Efficient Delay Test and Statistical Prediction for Configuring Post-silicon Tunable Buffers. CoRR abs/1705.04992 (2017) - [i2]Grace Li Zhang, Bing Li, Ulf Schlichtmann:
PieceTimer: A Holistic Timing Analysis Framework Considering Setup/Hold Time Interdependency Using A Piecewise Model. CoRR abs/1705.04993 (2017) - [i1]Grace Li Zhang, Bing Li, Jinglan Liu, Yiyu Shi, Ulf Schlichtmann:
Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning. CoRR abs/1705.04995 (2017) - 2016
- [c3]Grace Li Zhang, Bing Li, Ulf Schlichtmann:
EffiTest: efficient delay test and statistical prediction for configuring post-silicon tunable buffers. DAC 2016: 60:1-60:6 - [c2]Grace Li Zhang, Bing Li, Ulf Schlichtmann:
Sampling-based buffer insertion for post-silicon yield improvement under process variability. DATE 2016: 1457-1460 - [c1]Grace Li Zhang, Bing Li, Ulf Schlichtmann:
PieceTimer: a holistic timing analysis framework considering setup/hold time interdependency using a piecewise model. ICCAD 2016: 100
Coauthor Index
[j11] [c39] [c38] [c37] [c36] [c35] [c33] [c32] [c31] [i24] [i23] [i22] [i21] [i20] [i19] [i18] [i17] [i16] [j9] [j8] [j7] [c30] [c29] [c28] [c27] [c26] [c25] [c24] [i15] [i14] [i13] [i12] [i11] [j6] [j5] [c23] [c21] [i9] [i8] [i7] [i6] [j4] [c20] [c19] [c18] [c17] [c16] [c15] [j3] [c14] [c13] [c12] [c11] [c10] [c9] [i5] [j2] [c8] [j1] [c7] [c6] [c5] [c4] [i4] [i3] [i2] [i1] [c3] [c2] [c1]
[j11] [j10] [c38] [c37] [c36] [c35] [c33] [c32] [c31] [i24] [i23] [i22] [i21] [i20] [i19] [i18] [i16] [j9] [j8] [j7] [c30] [c29] [c27] [c26] [c25] [i15] [i14] [i13] [i11] [j6] [j5] [c23] [c22] [c21] [i9] [i8] [i7] [i6] [c20] [c19] [c18] [c17] [c16] [c15] [j3] [c14] [c13] [c12] [c11] [c10] [c9] [i5] [j2] [c8] [j1] [c7] [c6] [c5] [c4] [i4] [i3] [i2] [i1] [c3] [c2] [c1]
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