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Poona Bahrebar
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2020 – today
- 2021
- [c17]Poona Bahrebar, Leon Denis
, Maxim Bonnaerens, Kristof Coddens, Joni Dambre
, Wouter Favoreel, Illia Khvastunov, Adrian Munteanu, Hung Nguyen-Duc, Stefan Schulte, Dirk Stroobandt, Ramses Valvekens, Nick Van den Broeck, Geert Verbruggen:
cREAtIve: reconfigurable embedded artificial intelligence. CF 2021: 194-199 - 2020
- [c16]Jonathan D'Hoore, Poona Bahrebar, Dirk Stroobandt:
3D NoC emulation model on a single FPGA. SLIP 2020: 11
2010 – 2019
- 2018
- [j4]Poona Bahrebar, Dirk Stroobandt:
Abacus turn model-based routing for NoC interconnects with switch or link failures. Microprocess. Microsystems 59: 69-91 (2018) - [j3]Poona Bahrebar, Dirk Stroobandt:
Traffic-aware reconfigurable architecture for fault-tolerant 2D mesh NoCs. SIGBED Rev. 15(3): 25-30 (2018) - [c15]Poona Bahrebar, Dirk Stroobandt:
3D MAX: A Maximally Adaptive Routing Method for VC-less 3D Mesh-based Networks-on-Chip. NoCArc@MICRO 2018: 1-6 - 2017
- [b1]Poona Bahrebar:
Adaptive routing methods for on-chip interconnection networks. Ghent University, Belgium, 2017 - [c14]Amit Kulkarni, Poona Bahrebar, Dirk Stroobandt, Giulio Stramondo, Catalin Bogdan Ciobanu
, Ana Lucia Varbanescu:
A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration. FPT 2017: 203-206 - [c13]Poona Bahrebar, Azarakhsh Jalalvand, Dirk Stroobandt:
Dynamically Reconfigurable Architecture for Fault-Tolerant 2D Networks-on-Chip. ICCCN 2017: 1-7 - [c12]Poona Bahrebar, Dirk Stroobandt:
Adaptive and reconfigurable bubble routing technique for 2D Torus interconnection networks. ReCoSoC 2017: 1-8 - 2016
- [c11]Poona Bahrebar, Dirk Stroobandt:
Online reconfigurable routing method for handling link failures in NoC-based MPSoCs. ReCoSoC 2016: 1-8 - 2015
- [j2]Poona Bahrebar, Dirk Stroobandt:
The Hamiltonian-based odd-even turn model for maximally adaptive routing in 2D mesh networks-on-chip. Comput. Electr. Eng. 45: 386-401 (2015) - [c10]Poona Bahrebar, Dirk Stroobandt:
Hamiltonian Path Strategy for Deadlock-Free and Adaptive Routing in Diametrical 2D Mesh NoCs. CCGRID 2015: 1209-1212 - [c9]Poona Bahrebar, Dirk Stroobandt:
Design of TSV-Sharing Topologies for Cost-Effective 3D Networks-on-Chip. NoCArc@MICRO 2015: 15-20 - [c8]Poona Bahrebar, Dirk Stroobandt:
Design and exploration of routing methods for NoC-based multicore systems. ReConFig 2015: 1-4 - 2014
- [c7]Poona Bahrebar, Dirk Stroobandt:
Improving hamiltonian-based routing methods for on-chip networks: A turn model approach. DATE 2014: 1-4 - [c6]Poona Bahrebar, Dirk Stroobandt:
Characterizing Traffic Locality in 3D NoC-Based CMPs Using a Path-Based Partitioning Method. Hot Interconnects 2014: 63-70 - [c5]Poona Bahrebar, Dirk Stroobandt:
Adaptive and reconfigurable fault-tolerant routing method for 2D Networks-on-Chip. ReConFig 2014: 1-8 - [c4]Poona Bahrebar, Azarakhsh Jalalvand, Dirk Stroobandt:
Adaptive multicast routing method for 3D mesh-based Networks-on-Chip. SoCC 2014: 70-75 - 2013
- [c3]Poona Bahrebar, Dirk Stroobandt:
Towards balanced traffic distribution in NoCs using a highly adaptive path-based routing algorithm. HPCS 2013: 194-201 - [c2]Poona Bahrebar, Ruxandra-Marina Florea, Wim Heirman, Leon Denis, Adrian Munteanu, Dirk Stroobandt:
Making Communication a First-Class Citizen in Multicore Partitioning. PDP 2013: 287-293 - [c1]Poona Bahrebar, Dirk Stroobandt:
The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks. ReConFig 2013: 1-6 - 2010
- [j1]Tooraj Nikoubin, Poona Bahrebar, Sara Pouri, Keivan Navi, Vaez Iravani:
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits. VLSI Design 2010: 264390:1-264390:17 (2010)
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