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ORCIDYasir Mahmood Qureshi
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- affiliation: Swiss Federal Institute of Technology, Route Cantonale, Switzerland
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2020 – today
- 2023
[j4]Joshua Alexander Harrison Klein
, Irem Boybat, Yasir Mahmood Qureshi, Martino Dazzi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Abu Sebastian, David Atienza:
ALPINE: Analog In-Memory Acceleration With Tight Processor Integration for Deep Learning. IEEE Trans. Computers 72(7): 1985-1998 (2023)- 2022
- [c6]Rafael Medina, Joshua Kein, Yasir Mahmood Qureshi, Marina Zapater, Giovanni Ansaloni, David Atienza:
Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures. LASCAS 2022: 1-4 - [i1]Joshua Alexander Harrison Klein, Irem Boybat, Yasir Mahmood Qureshi, Martino Dazzi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Abu Sebastian, David Atienza:
ALPINE: Analog In-Memory Acceleration with Tight Processor Integration for Deep Learning. CoRR abs/2205.10042 (2022) - 2021
- [j3]Yasir Mahmood Qureshi, William Andrew Simon, Marina Zapater, Katzalin Olcoz, David Atienza:
Gem5-X: A Many-core Heterogeneous Simulation Platform for Architectural Exploration and Optimization. ACM Trans. Archit. Code Optim. 18(4): 44:1-44:27 (2021) - [j2]Yasir Mahmood Qureshi, Jose Manuel Herruzo, Marina Zapater, Katzalin Olcoz, Sonia Gonzalez-Navarro, Oscar G. Plata, David Atienza:
Genome Sequence Alignment - Design Space Exploration for Optimal Performance and Energy Architectures. IEEE Trans. Computers 70(12): 2218-2233 (2021) - 2020
- [j1]William Andrew Simon, Yasir Mahmood Qureshi, Marco Rios, Alexandre Levisse, Marina Zapater, David Atienza:
BLADE: An in-Cache Computing Architecture for Edge Devices. IEEE Trans. Computers 69(9): 1349-1363 (2020)
2010 – 2019
- 2019
- [c5]William Andrew Simon, Yasir Mahmood Qureshi, Alexandre Levisse, Marina Zapater, David Atienza:
BLADE: A BitLine Accelerator for Devices on the Edge. ACM Great Lakes Symposium on VLSI 2019: 207-212 - [c4]Yasir Mahmood Qureshi, William Andrew Simon, Marina Zapater, David Atienza, Katzalin Olcoz:
Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms. SpringSim 2019: 1-12 - [c3]João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon:
A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories. VLSI-SoC 2019: 160-165 - [c2]João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon:
Accelerating Inference on Binary Neural Networks with Digital RRAM Processing. VLSI-SoC (Selected Papers) 2019: 257-278 - 2018
- [c1]Ali Pahlevan, Yasir Mahmood Qureshi, Marina Zapater, Andrea Bartolini, Davide Rossi, Luca Benini, David Atienza:
Energy proportionality in near-threshold computing servers and cloud data centers: Consolidating or Not? DATE 2018: 147-152
Coauthor Index
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