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Zeyi Wang
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2020 – today
- 2024
- [j10]Zeyi Wang
, Ian E. Fellows
, Mark S. Handcock
:
Understanding networks with exponential-family random network models. Soc. Networks 78: 81-91 (2024) - [c22]Zeyi Wang, Weishang Liu, Yali Si:
Research on the Design of Tourism Cultural and Creative Products in Ancient Cities in China from the Perspective of Experience. HCI (60) 2024: 92-104 - [c21]Zeyi Wang, Songbai Liu, Jianyong Chen, Kay Chen Tan:
Large Language Model-Aided Evolutionary Search for Constrained Multiobjective Optimization. ICIC (2) 2024: 218-230 - [i1]Zeyi Wang, Songbai Liu, Jianyong Chen, Kay Chen Tan:
Large Language Model-Aided Evolutionary Search for Constrained Multiobjective Optimization. CoRR abs/2405.05767 (2024) - 2021
- [j9]Eric W. Bridgeford
, Shangsi Wang
, Zeyi Wang
, Ting Xu
, R. Cameron Craddock
, Jayanta Dey
, Gregory Kiar
, William R. Gray Roncal
, Carlo Colantuoni, Christopher Douville
, Stephanie Noble
, Carey E. Priebe
, Brian Caffo, Michael P. Milham
, Xi-Nian Zuo
, Joshua T. Vogelstein
:
Eliminating accidental deviations to minimize generalization error and maximize replicability: Applications in connectomics and genomics. PLoS Comput. Biol. 17(9) (2021)
2000 – 2009
- 2008
- [j8]Wenjian Yu, Xiren Wang, Zuochang Ye, Zeyi Wang:
Efficient Extraction of Frequency-Dependent Substrate Parasitics Using Direct Boundary Element Method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(8): 1508-1513 (2008) - [c20]Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu, Changhao Yan:
Efficient techniques for 3-D impedance extraction using mixed boundary element method. ASP-DAC 2008: 158-163 - [c19]Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang, Jinjun Xiong
:
An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation. DATE 2008: 580-585 - 2007
- [c18]Xiren Wang, Wenjian Yu, Zeyi Wang:
A New Boundary Element Method for Multiple-Frequency Parameter Extraction of Lossy Substrates. ASP-DAC 2007: 62-67 - 2006
- [j7]Wenjian Yu, Mengsheng Zhang, Zeyi Wang:
Efficient 3-D extraction of interconnect capacitance considering floating metal fills with boundary element method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1): 12-18 (2006) - [j6]Xiren Wang, Wenjian Yu, Zeyi Wang:
Efficient Direct Boundary Element Method for Resistance Extraction of Substrate With Arbitrary Doping Profile. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 3035-3042 (2006) - [c17]Mengsheng Zhang, Wenjian Yu, Yu Du, Zeyi Wang:
An efficient algorithm for 3-D reluctance extraction considering high frequency effect. ASP-DAC 2006: 521-526 - [c16]Xiren Wang, Wenjian Yu, Zeyi Wang:
A new boundary element method for accurate modeling of lossy substrates with arbitrary doping profiles. ASP-DAC 2006: 683-688 - [c15]Changhao Yan, Wenjian Yu, Zeyi Wang:
Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method. ASP-DAC 2006: 844-849 - [c14]Changhao Yan, Wenjian Yu, Zeyi Wang:
A Mixed Boundary Element Method for Extracting Frequency- Inductances of 3D Interconnects. ISQED 2006: 709-716 - 2005
- [j5]Xiren Wang, Deyan Liu, Wenjian Yu, Zeyi Wang:
Improved Boundary Element Method for Fast 3-D Interconnect Resistance Extraction. IEICE Trans. Electron. 88-C(2): 232-240 (2005) - [c13]Xiren Wang, Wenjian Yu, Zeyi Wang:
Substrate resistance extraction with direct boundary element method. ASP-DAC 2005: 208-211 - [c12]Xiren Wang, Wenjian Yu, Zeyi Wang, Xianlong Hong:
An improved direct boundary element method for substrate coupling resistance extraction. ACM Great Lakes Symposium on VLSI 2005: 84-87 - 2004
- [j4]Zhaozhi Yang, Zeyi Wang:
New Multipole Method for 3-D Capacitance Extraction. J. Comput. Sci. Technol. 19(4): 544-549 (2004) - [c11]Liu Yang, Xiaobo Guo, Zeyi Wang:
An efficient method MEGCR for solving systems with multiple right-hand sides in 3-D parasitic inductance extraction. ASP-DAC 2004: 702-706 - [c10]Xiren Wang, Deyan Liu, Wenjian Yu, Zeyi Wang:
Fast and accurate extraction of 3-D interconnect resistance: improved quasi-multiple medium accelerated BEM method. ASP-DAC 2004: 707-709 - 2003
- [c9]Taotao Lu, Zeyi Wang, Xianlong Hong:
BBE: hierarchical computation of 3-D interconnect capacitance with BEM block extraction. ASP-DAC 2003: 255-260 - [c8]Wenjian Yu, Zeyi Wang, Xianlong Hong:
Enhanced QMM-BEM Solver for 3-D Finite-Domain Capacitance Extraction with Multilayered Dielectrics. ICCD 2003: 58-63 - 2002
- [j3]Shuzhou Fang, Zeyi Wang:
A minimum-order boundary element method to extract the 3-D inductance and resistance of the interconnects in VLSI. Sci. China Ser. F Inf. Sci. 45(6): 453-461 (2002) - [c7]Shuzhou Fang, Zeyi Wang, Xianlong Hong:
A 3-D Minimum-Order Boundary Integral Equation Technique to Extract Frequency-Dependant Inductance and Resistance in ULSI. ASP-DAC/VLSI Design 2002: 305-310 - 2001
- [c6]Zhaozhi Yang, Zeyi Wang, Shuzhou Fang:
A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance. ASP-DAC 2001: 214-218 - [c5]Wenjian Yu, Zeyi Wang:
An efficient quasi-multiple medium algorithm fo the capacitance extraction of actual 3-D VLSI interconnects. ASP-DAC 2001: 366-372 - 2000
- [c4]Jiangchun Gu, Zeyi Wang, Xianlong Hong:
Hierarchical computation of 3-D interconnect capacitance using direct boundary element method. ASP-DAC 2000: 447-452 - [c3]Shuzhou Fang, Xiaobo Tang, Zeyi Wang, Xianlong Hong:
A simplified hybrid method for calculating the frequency-dependent inductances of transmission lines with rectangular cross section. ASP-DAC 2000: 453-456
1990 – 1999
- 1999
- [c2]Jinsong Hou, Zeyi Wang, Xianlong Hong:
The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance. ASP-DAC 1999: 93- - 1997
- [c1]Wenming Zhou, Zeyi Wang, Lan Rao:
Parallel calculation of 3-D parasitic resistance and capacitance with linear boundary elements. ASP-DAC 1997: 339-343 - 1996
- [j2]Zeyi Wang, Yanhong Yuan, Qiming Wu:
A parallel multipole accelerated 3-D capacitance simulator based on an improved model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(12): 1441-1450 (1996) - 1992
- [j1]Zeyi Wang, Qiming Wu:
A two-dimensional resistance simulator using the boundary element method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(4): 497-504 (1992)
Coauthor Index
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