default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDRenaud Pacalet
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
[i1]Maxime Spyropoulos, David Vigilant, Fabrice Perion, Renaud Pacalet, Laurent Sauvage:
Masked Vector Sampling for HQC. IACR Cryptol. ePrint Arch. 2024: 1106 (2024)- 2023
- [j12]Maysam Zoor
, Ludovic Apvrille, Renaud Pacalet, Sophie Coudert:
Execution trace analysis for a precise understanding of latency violations. Softw. Syst. Model. 22(5): 1519-1541 (2023) - 2021
- [j11]Matteo Bertolino, Renaud Pacalet, Ludovic Apvrille, Andrea Enrici:
Multi-resource scheduling for FPGA systems. Microprocess. Microsystems 87: 104373 (2021) - [c42]Maysam Zoor, Ludovic Apvrille, Renaud Pacalet:
Execution Trace Analysis for a Precise Understanding of Latency Violations. MoDELS 2021: 123-133 - 2020
- [c41]Amna Gharbi, Andrea Enrici, Bogdan Uscumlic, Ludovic Apvrille, Renaud Pacalet:
Efficient and Exact Design Space Exploration for Heterogeneous and Multi-Bus Platforms. DSD 2020: 16-23 - [c40]Matteo Bertolino, Renaud Pacalet, Ludovic Apvrille, Andrea Enrici:
Efficient Scheduling of FPGAs for Cloud Data Center Infrastructures. DSD 2020: 57-64 - [c39]Bogdan Uscumlic, Andrea Enrici, Renaud Pacalet, Amna Gharbi, Ludovic Apvrille, Lionel Natarianni, Laurent Roullet:
Design Space Exploration with Deterministic Latency Guarantees for Crossbar MPSoC Architectures. ICC 2020: 1-7 - [c38]Maysam Zoor, Ludovic Apvrille, Renaud Pacalet:
SysML models: studying safety and security measures impact on performance using graph tainting. MoDELS (Companion) 2020: 79:1-79:10 - [c37]Maysam Zoor, Ludovic Apvrille, Renaud Pacalet:
Impact of Security Measures on Performance Aspects in SysML Models. MODELSWARD 2020: 373-380
2010 – 2019
- 2019
- [c36]Benjamin Dauphin, Renaud Pacalet, Andrea Enrici, Ludovic Apvrille:
Odyn: Deadlock Prevention and Hybrid Scheduling Algorithm for Real-Time Dataflow Applications. DSD 2019: 88-95 - [c35]Radek Fujdiak, Petr Blazek, Ludovic Apvrille, Zdenek Martinasek, Petr Mlynek, Renaud Pacalet, David Smekal, Pavel Mrnustik, Maros Barabas, Maysam Zoor:
Modeling the Trade-off Between Security and Performance to Support the Product Life Cycle. MECO 2019: 1-6 - [c34]Andrea Enrici, Ludovic Apvrille, Renaud Pacalet:
Efficient Data-Flow Analysis of UML/SysML Diagrams for Optimized Model Compilation of Hardware-software Systems. MODELSWARD 2019: 84-95 - [c33]Andrea Enrici, Ludovic Apvrille, Renaud Pacalet, Minh Hiep Pham:
Static Data-Flow Analysis of UML/SysML Functional Views for Signal and Image Processing Applications. MODELSWARD (Revised Selected Papers) 2019: 101-126 - [c32]Maciej Bielski, Alvise Rigo, Renaud Pacalet:
Dynamic Guest Memory Resizing - Paravirtualized Approach. PDP 2019: 181-186 - 2018
- [c31]Andrea Enrici, Julien Lallet, Imran Latif, Ludovic Apvrille, Renaud Pacalet, Adrien Canuel:
A Model Compilation Approach for Optimized Implementations of Signal-processing Systems. MODELSWARD 2018: 25-35 - [c30]Andrea Enrici, Julien Lallet, Renaud Pacalet, Ludovic Apvrille, Karol Desnos, Imran Latif:
Model-Based Programming for Multi-processor Platforms with TTool/DIPLODOCUS and OMC. MODELSWARD (Revised Selected Papers) 2018: 56-81 - 2017
- [j10]Andrea Enrici, Ludovic Apvrille, Renaud Pacalet:
A Model-Driven Engineering Methodology to Design Parallel and Distributed Embedded Systems. ACM Trans. Design Autom. Electr. Syst. 22(2): 34:1-34:25 (2017) - 2016
- [c29]Maciej Bielski, Christian Pinto, Daniel Raho, Renaud Pacalet:
Survey on Memory and Devices Disaggregation Solutions for HPC Systems. CSE/EUC/DCABES 2016: 197-204 - 2015
- [c28]Letitia W. Li, Guillaume Duc, Renaud Pacalet:
Hardware-assisted Memory Tracing on New SoCs Embedding FPGA Fabrics. ACSAC 2015: 461-470 - [c27]Salaheddine Ouaarab, Guillaume Duc, Renaud Pacalet:
Performance optimizations of integrity checking based on Merkle trees. HASP@ISCA 2015: 10:1-10:4 - 2014
- [c26]Jeremie Brunel, Renaud Pacalet, Salaheddine Ouaarab, Guillaume Duc:
SecBus, a Software/Hardware Architecture for Securing External Memories. MobileCloud 2014: 277-282 - [c25]Andrea Enrici, Ludovic Apvrille, Renaud Pacalet:
A UML Model-Driven Approach to Efficiently Allocate Complex Communication Schemes. MoDELS 2014: 370-385 - [p1]Jair Gonzalez-Pina, Renaud Pacalet:
Model-Driven Design of Software Defined Radio Applications Based on UML. Embedded Systems Development, From Functional Models to Implementations 2014: 69-83 - 2013
- [j9]Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet:
Formal system-level design space exploration. Concurr. Comput. Pract. Exp. 25(2): 250-264 (2013) - [c24]Gunnar Schomaker, Andreas Herrholz, Guillaume Duc, Renaud Pacalet, Salvatore Raho, Miltos D. Grammatikakis, Marcello Coppola, Ignacio Garcia Vega:
TRESCCA - Trustworthy Embedded Systems for Secure Cloud Computing. ARES 2013: 844-845 - 2012
- [j8]Erick Amador, Raymond Knopp, Renaud Pacalet, Vincent Rezard:
Dynamic Power Management for the Iterative Decoding of Turbo Codes. IEEE Trans. Very Large Scale Integr. Syst. 20(11): 2133-2137 (2012) - [c23]Carina Schmidt-Knorreck, Renaud Pacalet, Andreas Minwegen, Uwe Deidersen, Torsten Kempf, Raymond Knopp, Gerd Ascheid:
Flexible front-end processing for software defined radio applications using application specific instruction-set processors. DASIP 2012: 1-8 - [c22]Jair Gonzalez-Pina, Rabéa Ameur-Boulifa, Renaud Pacalet:
DiplodocusDF, a Domain-Specific Modelling Language for Software Defined Radio Applications. EUROMICRO-SEAA 2012: 1-8 - 2010
- [j7]Sylvain Guilley, Laurent Sauvage, Florent Flament, Vinh-Nga Vong, Philippe Hoogvorst, Renaud Pacalet:
Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics. IEEE Trans. Computers 59(9): 1250-1263 (2010) - [c21]Oscar Gustafsson, Kiarash Amiri, Dennis Andersson, Anton Blad, Christian Bonnet, Joseph R. Cavallaro, Jeroen Declerck, Antoine Dejonghe, Patrik Eliardsson, Miguel Glassee, Aawatif Hayar, Lieven Hollevoet, Christopher Hunter, Madhura Joshi, Florian Kaltenberger, Raymond Knopp, Khanh Le, Zoran Miljanic, Patrick Murphy, Frederik Naessens, Navid Nikaein, Dominique Nussbaum, Renaud Pacalet, Praveen Raghavan, Ashutosh Sabharwal, Onkar Sarode, Predrag Spasojevic, Yang Sun, Hugo M. Tullberg, Tom Vander Aa, Liesbet Van der Perre, Michelle Wetterwald, Michael Wu:
Architectures for cognitive radio testbeds and demonstrators - An overview. CrownCom 2010: 1-6 - [c20]Erick Amador, Raymond Knopp, Vincent Rezard, Renaud Pacalet:
Dynamic Power Management on LDPC Decoders. ISVLSI 2010: 416-421 - [c19]Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet:
Formal System-level Design Space Exploration. NOTERE 2010: 1-8
2000 – 2009
- 2009
- [c18]Erick Amador, Renaud Pacalet, Vincent Rezard:
Optimum LDPC decoder: a memory architecture problem. DAC 2009: 891-896 - [c17]Lifeng Su, Stephan Courcambeck, Pierre Guillemin, Christian Schwarz, Renaud Pacalet:
SecBus: Operating System controlled hierarchical page-based memory bus protection. DATE 2009: 570-573 - [c16]Dominique Nussbaum, Karim Khalfallah, Christophe Moy, Amor Nafkha, Pierre Leray, Julien Delorme, Jacques Palicot, Jérôme Martin, Fabien Clermidy, Bertrand Mercier, Renaud Pacalet:
Open Platform for Prototyping of Advanced Software Defined Radio and Cognitive Radio Techniques. DSD 2009: 435-440 - [c15]Chafic Jaber, Andreas Kanstein, Ludovic Apvrille, Amer Baghdadi, Patricia Le Moenner, Renaud Pacalet:
High-Level System Modeling for Rapid HW/SW Architecture Exploration. IEEE International Workshop on Rapid System Prototyping 2009: 88-94 - [c14]Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet:
Fast Simulation Techniques for Design Space Exploration. TOOLS (47) 2009: 308-327 - 2008
- [j6]Sylvain Guilley, Laurent Sauvage, Philippe Hoogvorst, Renaud Pacalet, Guido Marco Bertoni, Sumanta Chaudhuri:
Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks. IEEE Trans. Computers 57(11): 1482-1497 (2008) - [c13]Muhammad Rashid, Ludovic Apvrille, Renaud Pacalet:
Application Specific Processors for Multimedia Applications. CSE 2008: 109-116 - [c12]Muhammad Najam-ul-Islam, Rizwan Rasheed, Renaud Pacalet, Raymond Knopp, Karim Khalfallah:
Flexible Baseband Architectures for Future Wireless Systems. DSD 2008: 39-46 - [c11]Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Renaud Pacalet:
Silicon-level Solutions to Counteract Passive and Active Attacks. FDTC 2008: 3-17 - [c10]Muhammad Rashid, Ludovic Apvrille, Renaud Pacalet:
Evaluation of ASIPs Design with LISATek. SAMOS 2008: 177-186 - 2007
- [j5]Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu:
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. IEEE Des. Test Comput. 24(6): 546-555 (2007) - [j4]Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet:
A fast pipelined multi-mode DES architecture operating in IP representation. Integr. 40(4): 479-489 (2007) - [c9]Muhammad Najam-ul-Islam, Karim Khalfallah, Raymond Knopp, Renaud Pacalet:
Reconfigurable DSP Architectures for SDR Applications. ICECS 2007: 971-974 - 2006
- [j3]Ludovic Apvrille, Pierre de Saqui-Sannes, Renaud Pacalet, Axelle Apvrille:
Un environnement de conception de systèmes distribués basé sur UML. Ann. des Télécommunications 61(11-12): 1347-1368 (2006) - [c8]Muhammad Waseem, Ludovic Apvrille, Rabéa Ameur-Boulifa, Sophie Coudert, Renaud Pacalet:
Abstract Application Modeling for System Design Space Exploration. DSD 2006: 331-337 - [c7]Sebastien Mazare, Jean-Luc Dugelay, Renaud Pacalet:
Using GPU for fast Block-Matching. EUSIPCO 2006: 1-4 - [c6]Ludovic Apvrille, Muhammad Waseem, Rabéa Ameur-Boulifa, Sophie Coudert, Renaud Pacalet:
A UML-based Environment for System Design Space Exploration. ICECS 2006: 1272-1275 - 2005
- [c5]Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet:
The "Backend Duplication" Method. CHES 2005: 383-397 - 2004
- [j2]Sylvain Guilley, Renaud Pacalet:
SoCs security: a war against side-channels. Ann. des Télécommunications 59(7-8): 998-1009 (2004) - [c4]Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet:
Differential Power Analysis Model and Some Results. CARDIS 2004: 127-142 - [c3]Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet, Jean Provost:
CMOS Structures Suitable for Secured Hardware. DATE 2004: 1414-1415 - 2000
- [j1]Stéphane Mancini, Renaud Pacalet:
LUX: A Heterogeneous Parallel Computer Dedicated to Ray Tracing. Parallel Distributed Comput. Pract. 3(3) (2000)
1990 – 1999
- 1999
- [c2]Stéphane Mancini, Renaud Pacalet:
LUX: An Heterogeneous Function Composition Parallel Computer for Graphics. Euro-Par 1999: 940-949 - 1997
- [c1]Carolina Miro, Nicolas Darbel, Renaud Pacalet, Valerie Paquet:
A VLSI Architecture for Image Geometrical Transformations Using an Embedded Core Based Processor. ASAP 1997: 86-95
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-07 21:21 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
