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2020 – today
- 2024
[j26]Jesús Lázaro
, Armando Astarloa, Aitzol Zuloaga, José Ángel Araujo, Jaime Jiménez:
AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems. IEEE Trans. Reliab. 73(1): 602-607 (2024)- [c45]Juan Manuel Galán, Ainhoa Cortés, Andoni Irizar, Alejandro Arteaga, Jose Ignacio Garate, Armando Astarloa:
Smart Carrier for Scan Chain Emulation of ASIC Prototypes under Test. DCIS 2024: 1-6 - 2023
- [c44]Armando Astarloa, Pedro Fernández, Jesús Lázaro, Mikel Idirin, Sergio Salas:
Time-Sensitive Networking to meet Hard-real Time Boundaries on Edge Intelligence Applications. DCIS 2023: 1-6 - [c43]Xabier Iturbe, Xabier Alberdi, Ander Aramburu, Armando Astarloa, Iñigo Barandiaran, Koldo Basterretxea, Angélica Dávila, Asier Erramuzpe, Iñigo Gabilondo, Garikoitz Lerma-Usabiaga, Lisandro Gabriel Monsalve, Libe Mori, Javier Navaridas, Jose Antonio Pascual, Joaquin Piriz, Serafim Rodrigues, Oscar Seijo, Ander Soraluze, Edgar Soria, Ignacio Torres, Nerea Uriarte, Juan Luis Valerdi:
SiliconBurmuin: A Horizon Europe propelled Neurocomputing Initiative in the Basque Country. SEAA 2023: 426-431 - 2022
- [j25]Le Sun, Leire Muguira, Jaime Jiménez, Armando Astarloa, Jesús Lázaro:
High-Performance Computing Architecture for Sample Value Processing in the Smart Grid. IEEE Access 10: 12208-12218 (2022) - [j24]Jesús Lázaro, Unai Bidarte, Leire Muguira, Armando Astarloa, Jaime Jiménez:
Embedded firewall for on-chip bus transactions. Comput. Electr. Eng. 98: 107707 (2022) - [j23]Iñaki Val, Óscar Seijo, Raul Torrego, Armando Astarloa:
IEEE 802.1AS Clock Synchronization Performance Evaluation of an Integrated Wired-Wireless TSN Architecture. IEEE Trans. Ind. Informatics 18(5): 2986-2999 (2022) - [c42]Pedro Fernández, Jaime Jiménez, Armando Astarloa, Mikel Idirin, Sergio Salas:
Accelerating Video Analytic Processing on Edge Intelligence. DCIS 2022: 1-6 - [c41]Roger Antonio Peña, Mikel Pascual, Armando Astarloa, Daniel Uribe, Jon Inchausti:
Impact of MACsec security on TSN traffic. DCIS 2022: 1-6 - 2021
- [j22]Mikel Rodriguez, Jesús Lázaro, Unai Bidarte, Jaime Jiménez, Armando Astarloa:
A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems. IEEE Access 9: 51646-51658 (2021) - [i1]Inaki Val, Oscar Seijo, Raul Torrego, Armando Astarloa:
IEEE 802.1AS Clock Synchronization Performance Evaluation of an Integrated Wired-Wireless TSN Architecture. CoRR abs/2109.09409 (2021) - 2020
- [c40]Jesús Lázaro, Laura Burgos, Leire Muguira, Armando Astarloa, Jaime Jiménez:
Electronic control board for student Rocket. DCIS 2020: 1-5 - [c39]Armando Astarloa, Mikel Rodriguez, Francisco Durán, Jaime Jiménez, Jesús Lázaro:
Synchronizing NTP Referenced SCADA Systems Interconnected by High-availability Networks. DCIS 2020: 1-6 - [c38]Leire Muguira, Jesús Lázaro, Sara Alonso, Armando Astarloa, Mikel Rodriguez:
Secure Critical Traffic of the Electric Sector over Time-Sensitive Networking. DCIS 2020: 1-6
2010 – 2019
- 2019
- [j21]Marcelo Urbina, Tatiana Acosta, Jesús Lázaro, Armando Astarloa, Unai Bidarte:
Smart Sensor: SoC Architecture for the Industrial Internet of Things. IEEE Internet Things J. 6(4): 6567-6577 (2019) - 2018
- [c37]Mikel Rodriguez, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez:
System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS. DCIS 2018: 1-6 - 2017
- [j20]Marcelo Urbina, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Igor Villalta, Mikel Rodriguez:
Cyber-Physical Production System Gateway Based on a Programmable SoC Platform. IEEE Access 5: 20408-20417 (2017) - [j19]Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jesús Lázaro, Armando Astarloa:
Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs. Microelectron. Reliab. 78: 85-92 (2017) - [j18]Naiara Moreira, Jesús Lázaro, Unai Bidarte, Jaime Jimenez, Armando Astarloa:
On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems. IEEE Trans. Smart Grid 8(4): 1932-1942 (2017) - 2016
- [j17]Elias Molina, Eduardo Jacob, Nerea Toledo, Armando Astarloa:
Performance Enhancement of High-Availability Seamless Redundancy (HSR) Networks Using OpenFlow. IEEE Commun. Lett. 20(2): 364-367 (2016) - [j16]Elias Molina, Eduardo Jacob, Armando Astarloa:
Using OpenFlow to control redundant paths in wireless networks. Netw. Protoc. Algorithms 8(1): 90-103 (2016) - [j15]Uli Kretzschmar, Julen Gomez-Cornejo, Armando Astarloa, Unai Bidarte, Javier Del Ser:
Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs. Reliab. Eng. Syst. Saf. 151: 1-9 (2016) - [c36]Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga, Jesús Lázaro:
Intelligent gateway for Industry 4.0-compliant production. IECON 2016: 4902-4907 - 2015
- [j14]Elias Molina, Eduardo Jacob, Jon Matías, Naiara Moreira, Armando Astarloa:
Using Software Defined Networking to manage and control IEC 61850-based systems. Comput. Electr. Eng. 43: 142-154 (2015) - [j13]José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Jose Ignacio Garate:
PRP and HSR for High Availability Networks in Power Utility Automation: A Method for Redundant Frames Discarding. IEEE Trans. Smart Grid 6(5): 2325-2332 (2015) - [c35]Elias Molina, Jon Matías, Armando Astarloa, Eduardo Jacob:
Managing path diversity in layer 2 critical networks by using OpenFlow. CNSM 2015: 394-397 - [c34]Armando Astarloa, Naiara Moreira, Unai Bidarte, Marcelo Urbina, David Modrono:
FPGA based nodes for sub-microsecond synchronization of cyber-physical production systems on high availability ring networks. ReConFig 2015: 1-6 - 2014
- [j12]Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser:
Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs. IEEE Trans. Ind. Electron. 61(5): 2493-2503 (2014) - [j11]Joaquin Perez, Jaime Jimenez, Asier Rabanal, Armando Astarloa, Jesús Lázaro:
FTL-CFree: A Fuzzy Real-Time Language for Runtime Verification. IEEE Trans. Ind. Informatics 10(3): 1670-1683 (2014) - [c33]Igor Villata, Unai Bidarte, Uli Kretzschmar, Armando Astarloa, Jesús Lázaro:
Fast and accurate SEU-tolerance characterization method for Zynq SoCs. FPL 2014: 1-4 - [c32]Aitzol Zuloaga, Armando Astarloa, Jaime Jimenez, Jesús Lázaro, Jose Angel Araujo:
Cost-effective redundancy for ethernet train communications using HSR. ISIE 2014: 1117-1122 - [c31]Naiara Moreira, Armando Astarloa, Uli Kretzschmar, Jesús Lázaro, Elias Molina:
Securing IEEE 1588 messages with message authentication codes based on the KECCAK cryptographic algorithm implemented in FPGAs. ISIE 2014: 1899-1904 - 2013
- [c30]Uli Kretzschmar, Armando Astarloa, Jesús Lázaro:
SEU Resilience of DES, AES and Twofish in SRAM-Based FPGA. ARC 2013: 37-46 - [c29]Stefanie Castillo, Armando Astarloa, Jesús Lázaro, Sergio Salas, Isaac Ballesteros:
SDR control interface: An FPGA based infrastructure for control of VPX Software Defined Radio systems. FPL 2013: 1-4 - [c28]José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Naiara Moreira, Alain García:
Memory requirements analysis for PRP and HSR hardware implementations on FPGAs. IECON 2013: 2297-2302 - [c27]Naiara Moreira, Armando Astarloa, Uli Kretzschmar:
SHA-3 based Message Authentication Codes to secure IEEE 1588 synchronization systems. IECON 2013: 2323-2328 - [c26]Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Mikel Idirin:
System-on-Chip implementation of Reliable Ethernet Networks nodes. IECON 2013: 2329-2334 - [c25]José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Alain García:
PRP and HSR version 1 (IEC 62439-3 Ed.2), improvements and a prototype implementation. IECON 2013: 4410-4415 - [c24]José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Naiara Moreira:
Duplicate and circulating frames discard methods for PRP and HSR (IEC62439-3). IECON 2013: 4451-4456 - [c23]Naiara Moreira, Armando Astarloa, Jesús Lázaro, Alain García, Enekoitz Ormaetxea:
IEEE 1588 Transparent Clock architecture for FPGA-based network devices. ISIE 2013: 1-6 - 2012
- [c22]Javier Del Ser, Asier Alonso, Sergio Gil-Lopez, Mikel Garay, Uli Kretzschmar, Armando Astarloa:
On the design of an heuristically optimized multiband spectrum sensing approach for cognitive radio systems. CAMAD 2012: 168-169 - [c21]Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser:
Fast and accurate Single Bit Error injection into SRAM Based FPGAs. FPL 2012: 675-678 - [c20]Jose Angel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Alain García:
High availability automation networks: PRP and HSR ring implementations. ISIE 2012: 1197-1202 - [c19]Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Mikel Garay, Javier Del Ser:
Robustness of different TMR granularities in shared wishbone architectures on SRAM FPGA. ReConFig 2012: 1-6 - 2011
- [j10]Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, Jaime Jimenez:
I2CSec: A secure serial Chip-to-Chip communication protocol. J. Syst. Archit. 57(2): 206-213 (2011) - [c18]Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Jaime Jimenez, Aitzol Zuloaga:
An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS. SoC 2011: 96-101 - [c17]Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez:
Robustness Analysis of Different AES Implementations on SRAM Based FPGAs. ReConFig 2011: 255-260 - [c16]Oscar Daniel Diaz, Armando Astarloa, Aitzol Zuloaga, Jesús Lázaro, Jaime Jimenez:
NoCmodel: An extensible framework for Network-on-Chips modeling. ReCoSoC 2011: 1-6 - 2010
- [j9]Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa:
Reconfigurable Multiprocessor Systems: A Review. Int. J. Reconfigurable Comput. 2010: 570279:1-570279:10 (2010) - [j8]Jesús Lázaro, José Luis Martín, Jagoba Arias, Armando Astarloa, Carlos Cuadrado:
Neuro semantic thresholding using OCR software for high precision OCR applications. Image Vis. Comput. 28(4): 571-578 (2010) - [c15]Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, José Luis Martín:
An Autonomous Fault Tolerant System for CAN Communications. IEA/AIE (3) 2010: 281-290
2000 – 2009
- 2009
- [c14]Jesús Lázaro, Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga:
AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications. ARC 2009: 312-317 - [c13]Xabier Iturbe, Mikel Azkarate-askasua, Imanol Martinez, Jon Pérez, Armando Astarloa:
A novel SEU, MBU and SHE handling strategy for Xilinx Virtex-4 FPGAs. FPL 2009: 569-573 - [c12]Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez:
DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus. ICDCS Workshops 2009: 472-475 - [c11]Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez:
PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems. ReConFig 2009: 54-58 - [c10]Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa:
Overview of FPGA-Based Multiprocessor Systems. ReConFig 2009: 273-278 - 2008
- [c9]Armando Astarloa, Unai Bidarte, Jaime Jimenez, Jesús Lázaro, Iñigo Martínez de Alegría:
Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes. ATC 2008: 603-614 - [c8]Armando Astarloa, Unai Bidarte, Jesús Lázaro, Jon Andreu, José Luis Martín:
Configurable-System-on-Programmable-Chip for Power Electronics Control Applications. ReConFig 2008: 169-174 - 2007
- [j7]Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez, Armando Astarloa:
GPS-less location algorithm for wireless sensor networks. Comput. Commun. 30(14-15): 2904-2916 (2007) - [j6]Jesús Lázaro, Jagoba Arias, Armando Astarloa, Unai Bidarte, Aitzol Zuloaga:
Hardware architecture for a general regression neural network coprocessor. Neurocomputing 71(1-3): 78-87 (2007) - [j5]Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez:
Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs. J. Syst. Archit. 53(9): 629-643 (2007) - [j4]Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa, Aitzol Zuloaga:
Design of a Master Device for the Multifunction Vehicle Bus. IEEE Trans. Veh. Technol. 56(6): 3695-3708 (2007) - 2006
- [c7]Purificación Sáiz, Jon Matías, Eduardo Jacob, Javier Bustamante, Armando Astarloa:
Adaptation of IEEE 802.1X for Secure Session Establishment Between Ethernet Peers. ICISS 2006: 220-234 - [c6]Jaime Jimenez, Iker Hoyos, Jagoba Arias, Armando Astarloa, José Luis Martín:
Modifying Slots in Test Vectors to Validate Decoders of a Train Network. ICWMC 2006: 58 - 2005
- [j3]Jesús Lázaro, Jagoba Arias, José Luis Martín, Carlos Cuadrado, Armando Astarloa:
Implementation of a modified Fuzzy C-Means clustering algorithm for real-time applications. Microprocess. Microsystems 29(8-9): 375-380 (2005) - [j2]Armando Astarloa, Unai Bidarte, Jesús Lázaro, Aitzol Zuloaga, Jagoba Arias:
Multiprocessor SoPC-Core for FAT volume computation. Microprocess. Microsystems 29(10): 421-434 (2005) - 2004
- [j1]Jagoba Arias, Aitzol Zuloaga, Jesús Lázaro, Jon Andreu, Armando Astarloa:
Malguki: an RSSI based ad hoc location algorithm. Microprocess. Microsystems 28(8): 403-409 (2004) - [c5]Unai Bidarte, Armando Astarloa, José Luis Martín, Jon Andreu:
Simulation Platform for Architectural Verification and Performance Analysis in Core-Based SoC Design. FPL 2004: 965-969 - [c4]Jesús Lázaro, Armando Astarloa, Jagoba Arias, Unai Bidarte, Carlos Cuadrado:
High Throughput Serpent Encryption Implementation. FPL 2004: 996-1000 - [c3]Armando Astarloa, Jesús Lázaro, Unai Bidarte, José Luis Martín, Aitzol Zuloaga:
A Self-Reconfiguration Framework for Multiprocessor CSoPCs. FPL 2004: 1124-1126 - [c2]Armando Astarloa, Jesús Lázaro, Jagoba Arias, Unai Bidarte, Aitzol Zuloaga:
Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development. MSV/AMCS 2004: 17-22 - 2003
- [c1]Unai Bidarte, Armando Astarloa, Aitzol Zuloaga, Jaime Jimenez, Iñigo Martínez de Alegría:
Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements. FPL 2003: 497-506
Coauthor Index
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