Jiande Wu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Meikang Qiu

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Publications

2009
[j1]
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Meikang Qiu, Meiqin Liu, Hao Li, Hung-Chung Huang, Wenyuan Li, Jiande Wu:
Energy-Aware Loop Scheduling and Assignment for Multi-Core, Multi-Functional-Unit Architecture. J. Signal Process. Syst. 57(3): 363-379 (2009)
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  - conf/rtcsa/QiuWHLW09
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Meikang Qiu, Jiande Wu, Fei Hu, Shaobo Liu, Lingfeng Wang:
Voltage Assignment for Soft Real-Time Embedded Systems with Continuous Probability Distribution. RTCSA 2009: 413-418
2008
[c6]
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Meikang Qiu, Jiande Wu, Chun Jason Xue, Jingtong Hu, Wei-Che Tseng, Edwin Hsing-Mean Sha:
QoS for Networked Heterogeneous Real-Time Embedded Systems. PDCCS 2008: 135-140
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  - conf/cse/QiuHYW08
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Meikang Qiu, Hung-Chung Huang, Laurence Tianruo Yang, Jiande Wu:
Intelligent Search Agent for Internet Computing with Fuzzy Approach. CSE 2008: 181-188
[c4]
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  - conf/euc/QiuWHHS08
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Meikang Qiu, Jiande Wu, Jingtong Hu, Yi He, Edwin Hsing-Mean Sha:
Dynamic and Leakage Power Minimization with Loop Voltage Scheduling and Assignment. EUC (1) 2008: 192-198
[c3]
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  - conf/fpl/QiuWXHTS08
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Meikang Qiu, Jiande Wu, Chun Jason Xue, Jingtong Hu, Wei-Che Tseng, Edwin Hsing-Mean Sha:
Loop scheduling and assignment to minimize energy while hiding latency for heterogeneous multi-bank memory. FPL 2008: 459-462
[c2]
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Meikang Qiu, Jiande Wu:
Energy saving for memory with loop scheduling and prefetching. ACM Great Lakes Symposium on VLSI 2008: 155-158

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