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ORCIDSamar Abdi
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2020 – today
- 2022
[i1]Ehsan Saboori, Samar Abdi:
Rapid design space exploration of multi-clock domain MPSoCs with hybrid prototyping. CoRR abs/2208.05068 (2022)
2010 – 2019
- 2016
- [c36]Samar Abdi, Umair Aftab, Gordon Bailey, Bochra Boughzala, Faras Dewal, Shafigh Parsazad, Eric Tremblay:
PFPSim: A Programmable Forwarding Plane Simulator. ANCS 2016: 55-60 - [c35]Ehsan Saboori
, Samar Abdi:
Rapid design space exploration of multi-clock domain MPSoCs with hybrid prototyping. CCECE 2016: 1-6 - [c34]Ehsan Saboori, Samar Abdi:
Fast and cycle-accurate simulation of multi-threaded applications on SMP architectures using hybrid prototyping. CODES+ISSS 2016: 11:1-11:10 - 2015
- [c33]Zaid Al-Khatib, Samar Abdi:
Operand-Value-Based Modeling of Dynamic Energy Consumption of Soft Processors in FPGA. ARC 2015: 65-76 - [c32]Paul Leons, Aryan Yaghoubian, Glenn E. R. Cowan, Jelena Trajkovic, Yvon Nazon, Samar Abdi:
On improving the range of inductive proximity sensors for avionic applications. ISQED 2015: 547-551 - 2014
- [c31]Jacopo Panerati, Samar Abdi, Giovanni Beltrame:
Balancing system availability and lifetime with dynamic hidden Markov models. AHS 2014: 240-247 - [c30]Ali Barzegar, Ehsan Saboori, Samar Abdi:
DRAC: a dynamically reconfigurable active L1 cache model for hybrid prototyping of multicore embedded systems. RSP 2014: 86-92 - 2013
- [j6]Hansu Cho, Lochi Yu, Samar Abdi:
Automatic Generation of Transducer Models for Bus-Based MPSoC Design. IEEE Trans. Computers 62(2): 211-224 (2013) - [c29]Ehsan Saboori, Samar Abdi:
Hybrid prototyping of multicore embedded systems. DATE 2013: 1627-1630 - [c28]Parthasarathy Ravishankar, Samar Abdi:
pCache: An Observable L1 Data Cache Model for FPGA Prototyping of Embedded Systems. DSD 2013: 103-110 - [c27]Richard Lee, Samar Abdi, Frederic Risacher:
Early and Accurate Modeling of Streaming Embedded Applications. EUROMICRO-SEAA 2013: 212-219 - [c26]Richard Lee, Karim Abdel-Khalek, Samar Abdi, Frederic Risacher:
Early system level modeling of real-time applications on embedded platforms. ISQED 2013: 558-565 - 2012
- [j5]Jelena Trajkovic, Samar Abdi, Gabriela Nicolescu, Daniel D. Gajski:
Automated Generation of Custom Processor Core from C Code. J. Electr. Comput. Eng. 2012: 862469:1-862469:26 (2012) - [c25]Richard Lee, Samar Abdi, Doug Regehr, Frederic Risacher:
System level modeling of real-time embedded software. ICCD 2012: 496-497 - 2011
- [j4]Samar Abdi, Yonghyun Hwang, Lochi Yu, Gunar Schirner, Daniel D. Gajski:
Automatic TLM Generation for Early Validation of Multicore Systems. IEEE Des. Test Comput. 28(3): 10-19 (2011) - [c24]Hansu Cho, Samar Abdi:
Automatic generation of transducer models for multicore system design. HLDVT 2011: 72-79 - 2010
- [c23]Samar Abdi:
TLM automation for multi-core design. ASP-DAC 2010: 717-724 - [c22]Yonghyun Hwang, Gunar Schirner, Samar Abdi, Daniel D. Gajski:
Accurate timed RTOS model for transaction level modeling. DATE 2010: 1333-1336 - [c21]Samar Abdi:
Automatic generation of host-compiled timed TLMs for high level design. HLDVT 2010: 103-104 - [c20]Samar Abdi, Yonghyun Hwang, Lochi Yu, Hansu Cho, Ines Viskic, Daniel D. Gajski:
Embedded system environment: A framework for TLM-based design and prototyping. International Symposium on Rapid System Prototyping 2010: 1-7
2000 – 2009
- 2009
- [j3]Samar Abdi, Daniel Gajski, Ines Viskic:
Model Based Synthesis of Embedded Software. J. Softw. 4(7): 717-727 (2009) - [c19]Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski:
Hardware-dependent software synthesis for many-core embedded systems. ASP-DAC 2009: 304-310 - [c18]Yonghyun Hwang, Gunar Schirner, Samar Abdi:
Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support. IESS 2009: 66-76 - 2008
- [j2]Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski:
System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design. EURASIP J. Embed. Syst. 2008 (2008) - [c17]Yonghyun Hwang, Samar Abdi, Daniel Gajski:
Cycle-approximate Retargetable Performance Estimation at the Transaction Level. DATE 2008: 3-8 - [c16]Daniel D. Gajski, Samar Abdi, Ines Viskic:
Model Based Synthesis of Embedded Software. SEUS 2008: 21-33 - 2007
- [c15]Lucky L. Chi Yu Lo, Samar Abdi:
Automatic TLM generation for C-Based MPSoC design. HLDVT 2007: 29-36 - [c14]Lochi Yu, Samar Abdi:
Automatic SystemC TLM generation for custom communication platforms. ICCD 2007: 41-46 - [c13]Hansu Cho, Samar Abdi, Daniel Gajski:
Interface synthesis for heterogeneous multi-core systems from transaction level models. LCTES 2007: 140-142 - [c12]Ines Viskic, Samar Abdi, Daniel D. Gajski:
Automatic generation of embedded communication SW for heterogeneous MPSoC platforms. LCTES 2007: 143-145 - 2006
- [j1]Samar Abdi, Daniel Gajski:
Verification of System Level Model Transformations. Int. J. Parallel Program. 34(1): 29-59 (2006) - [c11]Hansu Cho, Samar Abdi, Daniel Gajski:
Design and implementation of transducer for ARM-TMS communication. ASP-DAC 2006: 126-127 - [c10]Samar Abdi, Daniel Gajski:
Transaction Routing and its Verification by Correct Model Transformations. HLDVT 2006: 129-136 - 2005
- [c9]Samar Abdi, Daniel Gajski:
A formalism for functionality preserving system level transformations. ASP-DAC 2005: 139-144 - [c8]Junyu Peng, Samar Abdi, Daniel Gajski:
A clustering technique to optimize hardware/software synchronization. ASP-DAC 2005: 965-968 - [c7]Samar Abdi, Daniel D. Gajski:
Functional Validation of System Level Static Scheduling. DATE 2005: 542-547 - 2004
- [c6]Samar Abdi, Daniel Gajski:
On deriving equivalent architecture model from system specification. ASP-DAC 2004: 322-327 - [c5]Dongwan Shin, Samar Abdi, Daniel Gajski:
Automatic generation of bus functional models from transaction level models. ASP-DAC 2004: 756-758 - [c4]Samar Abdi, Daniel Gajski:
Automatic generation of equivalent architecture model from functional specification. DAC 2004: 608-613 - [c3]Samar Abdi, Daniel Gajski:
Model validation for mapping specification behaviors to processing elements. HLDVT 2004: 101-106 - 2003
- [c2]Samar Abdi, Dongwan Shin, Daniel Gajski:
Automatic communication refinement for system level design. DAC 2003: 300-305 - 2002
- [c1]Junyu Peng, Samar Abdi, Daniel Gajski:
Automatic Model Refinement for Fast Architecture Exploration. ASP-DAC/VLSI Design 2002: 332-337
Coauthor Index
aka: Daniel D. Gajski
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