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ORCIDTakao Kihara
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2020 – today
- 2021
[c14]Takao Kihara:
Digital Background Correction for Channel Mismatch and Third-Order Nonlinearity of TI-ADCs with VCOs. APCCAS 2021: 113-116- 2020
- [c13]Yuka Nakamatsu, Takao Kihara:
Dynamic Reduction of Power Consumption in Direct-RF Sampling Receivers with Variable Decimation. APCCAS 2020: 54-57
2010 – 2019
- 2019
- [j11]Takao Kihara
, Tomoya Takahashi, Tsutomu Yoshimura:
Digital Mismatch Correction for Bandpass Sampling Four-Channel Time-Interleaved ADCs in Direct-RF Sampling Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2007-2016 (2019) - [c12]Yuma Isobe, Takao Kihara:
First-Order Recursive CIC Filters in Time-Interleaved VCO-Based ADCs for Direct-RF Sampling Receivers. APCCAS 2019: 25-28 - [c11]Takao Kihara, Keisuke Miyakoshi, Tsutomu Yoshimura:
Digital Third-Order Nonlinearity Correction for Time-Interleaved A/D Converters with VCOs. ISCAS 2019: 1-4 - 2018
- [c10]Fukuyama Tokuya, Takao Kihara, Tsunehiro Yoshio, Tsutomu Yoshimura:
A Standard-cell Based A/D Converter with a Back-gate VCO and a Fat Tree Encoder. APCCAS 2018: 22-25 - [c9]Yuma Isobe, Takao Kihara, Tsutomu Yoshimura:
A Polyphase Decimation Filter for Time-Interleaved ADCs in Direct-RF Sampling Receivers. APCCAS 2018: 163-166 - [c8]Kazuki Miyao, Tatsuya Okafuji, Takao Kihara, Tsutomu Yoshimura:
Study of mutual injection pulling in a 5-GHz, 0.18-μm CMOS cascaded PLL. APCCAS 2018: 175-178 - 2017
- [c7]Tomoya Takahashi, Takao Kihara, Tsutomu Yoshimura:
Digital correction of mismatches in time-interleaved ADCs for digital-RF receivers. ICECS 2017: 9-12 - [c6]Mayu Kobayashi, Yuya Masui, Takao Kihara, Tsutomu Yoshimura:
Spur reduction by self-injection loop in a fractional-N PLL. ICECS 2017: 260-263 - [c5]Takao Kihara, Hiroyuki Yano, Tsutomu Yoshimura:
Design of cascaded integrator-comb decimation filters for direct-RF sampling receivers. ISCAS 2017: 1-4 - 2016
- [j10]Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Weimin Wang, Takao Kihara, Toshimasa Matsuoka:
A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices. IEICE Trans. Electron. 99-C(4): 431-439 (2016) - [c4]Naohiro Fujii, Shuei Morishita, Takao Kihara, Tsutomu Yoshimura:
A 2.6GHz subharmonically injection-locked PLL with low-spur and wide-lock-range injection. NEWCAS 2016: 1-4 - [c3]Takao Kihara, Shigesato Matsuda, Tsutomu Yoshimura:
Analysis and design of differential LNAs with on-chip transformers in 65-nm CMOS technology. NEWCAS 2016: 1-4 - 2015
- [j9]Saichandrateja Radhapuram, Jung Nam Bae, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka:
A low-power CMOS programmable frequency divider with novel retiming scheme. IEICE Electron. Express 12(6): 20141233 (2015) - [j8]Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka:
A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator. IEICE Trans. Electron. 98-C(12): 1179-1186 (2015) - [c2]Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka:
A low-voltage design of controller-based ADPLL for implantable biomedical devices. BioCAS 2015: 1-4 - [c1]Shuei Morishita, Shinji Shimizu, Takao Kihara, Tsutomu Yoshimura:
Subharmonically injection-locked PLL with variable pulse-width injections. ISCAS 2015: 557-560 - 2013
- [j7]Takao Kihara, Tomohiro Sano, Masakazu Mizokami, Yoshikazu Furuta, Mitsuhiko Hokazono, Takaya Maruyama, Tetsuya Heima, Hisayasu Sato:
A Multiband LTE SAW-Less CMOS Transmitter with Source-Follower-Driven Passive Mixers, Envelope-Tracked RF-PGAs, and Marchand Baluns. IEICE Trans. Electron. 96-C(6): 774-782 (2013) - 2010
- [j6]Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi:
A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier. IEICE Trans. Electron. 93-C(2): 187-199 (2010) - [j5]Toshimasa Matsuoka, Jun Wang, Takao Kihara, Hyunju Ham, Kenji Taniguchi:
Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(2): 356-366 (2010)
2000 – 2009
- 2009
- [j4]Fumiaki Yamashita, Toshimasa Matsuoka, Takao Kihara, Isao Takobe, Hae-Ju Park, Kenji Taniguchi:
Analytical design of a 0.5V 5GHz CMOS LC-VCO. IEICE Electron. Express 6(14): 1025-1031 (2009) - [j3]Takao Kihara, Hae-Ju Park, Isao Takobe, Fumiaki Yamashita, Toshimasa Matsuoka, Kenji Taniguchi:
A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier. IEICE Trans. Electron. 92-C(4): 564-575 (2009) - 2007
- [j2]Takao Kihara, Gue Chol Kim, Masaru Goto, Keiji Nakamura, Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi:
Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(2): 317-325 (2007) - 2006
- [j1]Gue Chol Kim, Yoshiyuki Shimizu, Bunsei Murakami, Masaru Goto, Keisuke Ueda, Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi:
Accurate Small-Signal Modeling of FD-SOI MOSFETs. IEICE Trans. Electron. 89-C(4): 517-519 (2006)
Coauthor Index
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