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ORCIDNorihito Kato
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2020 – today
- 2022
[j5]Fukashi Morishita
, Wataru Saito, Norihito Kato, Yoichi Iizuka, Masao Ito:
High Accuracy Test Techniques with Fine Pattern Generator and Ramp Test Circuit for CMOS Image Sensor. IEICE Trans. Electron. 105-C(7): 316-323 (2022)- [j4]Fukashi Morishita, Wataru Saito, Yoichi Iizuka, Norihito Kato, Ryota Otake, Masao Ito:
A 30.2-µ Vrms Horizontal Streak Noise 8.3-Mpixel 60-Frames/s CMOS Image Sensor With Skew-Relaxation ADC and On-Chip Testable Ramp Generator for Surveillance Camera. IEEE J. Solid State Circuits 57(10): 3103-3113 (2022) - [j3]Norihito Kato, Fukashi Morishita, Satoshi Okubo, Masao Ito:
Circuit Techniques to Improve Low-Light Characteristics and High-Accuracy Evaluation System for CMOS Image Sensor. Sensors 22(16): 6040 (2022) - 2021
- [c3]Wataru Saito, Yoichi Iizuka, Norihito Kato, Ryota Otake, Fukashi Morishita:
A Low Noise and Linearity Improvement CMOS Image Sensor for Surveillance Camera with Skew-Relaxation Local Multiply Circuit and On-Chip Testable Ramp Generator. A-SSCC 2021: 1-3 - [c2]Fukashi Morishita, Norihito Kato, Satoshi Okubo, Takao Toi, Mitsuru Hiraki, Sugako Otani, Hideaki Abe, Yuji Shinohara, Hiroyuki Kondo:
A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems. VLSI Circuits 2021: 1-2
2010 – 2019
- 2013
- [j2]Yuji Nakajima, Norihito Kato, Akemi Sakaguchi, Toshio Ohkido, Takahiro Miki:
A 7-bit, 1.4 GS/s ADC With Offset Drift Suppression Techniques for One-Time Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(8): 1979-1990 (2013) - 2012
- [c1]Yuji Nakajima, Norihito Kato, Akemi Sakaguchi, Toshio Ohkido, Kenji Shimomaki, Hiroko Masuda, Chikahiro Shiroma, Michio Yotsuyanagi, Takahiro Miki:
A 7b 1.4GS/s ADC with offset drift suppression techniques for one-time calibration. CICC 2012: 1-4 - 2010
- [j1]Yuji Nakajima, Akemi Sakaguchi, Toshio Ohkido, Norihito Kato, Tetsuya Matsumoto, Michio Yotsuyanagi:
A Background Self-Calibrated 6b 2.7 GS/s ADC With Cascade-Calibrated Folding-Interpolating Architecture. IEEE J. Solid State Circuits 45(4): 707-718 (2010)
Coauthor Index
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