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2020 – today
- 2024
[j15]Stefano Bertazzoni
, Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
Design Space Exploration for Edge Machine Learning Featured by MathWorks FPGA DL Processor: A Survey. IEEE Access 12: 9418-9439 (2024)- [j14]Lorenzo Canese, Gian Carlo Cardarilli, Riccardo La Cesa, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Sergio Spanò:
A Novel Digital Equalizer Based on RF Sampling Beyond GHz. IEEE Access 12: 92560-92572 (2024) - 2023
- [j13]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Alberto Nannarelli, Sergio Spanò:
An RNS-Based Initial Absolute Position Estimator for Electrical Encoders. IEEE Access 11: 98586-98595 (2023) - [j12]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Sergio Spanò:
Efficient Digital Implementation of a Multirate-Based Variable Fractional Delay Filter for Wideband Beamforming. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 2231-2235 (2023) - [c37]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
A Hardware-Oriented QAM Demodulation Method Driven by AW-SOM Machine Learning. ACSSC 2023: 937-941 - [c36]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Riccardo La Cesa, Alberto Nannarelli, Marco Re:
Tunable Floating Point for High Quality Audio Systems: The Sound of Numbers. ACSSC 2023: 1547-1551 - [c35]Damiano Angeloni, Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, Sergio Spanò:
A RISC-V Hardware Accelerator for Q-Learning Algorithm. ApplePies 2023: 74-79 - 2022
- [j11]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Andrea Ricci, Sergio Spanò:
An FPGA-based multi-agent Reinforcement Learning timing synchronizer. Comput. Electr. Eng. 99: 107749 (2022) - [j10]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Hamed Famil Ghadakchi, Marco Re, Sergio Spanò:
Sensing and Detection of Traffic Signs Using CNNs: An Assessment on Their Performance. Sensors 22(22): 8830 (2022) - [j9]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Massimo Petricca, Marco Re:
Design Space Exploration Based Methodology for Residue Number System Digital Filters Implementation. IEEE Trans. Emerg. Top. Comput. 10(1): 186-198 (2022) - [c34]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
Automatic IP Core Generator for FPGA-Based Q-Learning Hardware Accelerators. ApplePies 2022: 242-247 - [c33]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
FPGA-Based Road Crack Detection Using Deep Learning. SYSINT 2022: 65-73 - 2021
- [j8]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Massimo Panella, Marco Re, Antonello Rosato, Sergio Spanò:
A Parallel Hardware Implementation for 2-D Hierarchical Clustering Based on Fuzzy Logic. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1428-1432 (2021) - [j7]Daniele Giardino, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re, Sergio Spanò:
M-PSK Demodulator With Joint Carrier and Timing Recovery. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1912-1916 (2021) - [c32]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Dario Natale, Marco Re, Sergio Spanò:
"MR Q-Learning" Algorithm for Efficient Hardware Implementations. ACSCC 2021: 1186-1190 - [c31]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Matteo Guadagno, Marco Re, Sergio Spanò:
A M-PSK Timing Recovery Loop Based on Q-Learning. ApplePies 2021: 39-44 - [c30]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Riccardo La Cesa, Marco Re:
Design and FPGA Implementation of a Low Power OFDM Transmitter for Narrow-Band IoT. SYSTEM 2021: 60-65 - 2020
- [j6]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
AW-SOM, an Algorithm for High-Speed Learning in Hardware Self-Organizing Maps. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 380-384 (2020) - [j5]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re, Sergio Spanò:
N-Dimensional Approximation of Euclidean Distance. IEEE Trans. Circuits Syst. II Express Briefs 67-II(3): 565-569 (2020) - [c29]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Alberto Nannarelli, Marco Re, Sergio Spanò:
FPGA Implementation of Q-RTS for Real-Time Swarm Intelligence Systems. ACSSC 2020: 116-120 - [c28]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Marco Re, Sergio Spanò:
An Action-Selection Policy Generator for Reinforcement Learning Hardware Accelerators. ApplePies 2020: 267-272
2010 – 2019
- 2019
- [j4]Marco Matta, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Alberto Nannarelli, Marco Re, Sergio Spanò:
A Reinforcement Learning-Based QAM/PSK Symbol Synchronizer. IEEE Access 7: 124147-124157 (2019) - [j3]Sergio Spanò, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Alberto Nannarelli, Marco Re:
An Efficient Hardware Implementation of Reinforcement Learning: The Q-Learning Algorithm. IEEE Access 7: 186340-186351 (2019) - [c27]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re:
Approximated Canonical Signed Digit for Error Resilient Intelligent Computation. ACSSC 2019: 1616-1620 - [c26]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Marco Re, Sergio Spanò:
Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning. ApplePies 2019: 325-331 - [c25]L. Calicchia, V. Ciotoli, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re:
Digital Signal Processing Accelerator for RISC-V. ICECS 2019: 703-706 - 2018
- [j2]Amirhossein Fereidountabar, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari:
Channel estimation for high speed unmanned aerial vehicle with STBC in MIMO radio links. Int. J. Comput. Vis. Robotics 8(3): 318-335 (2018) - [c24]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re:
A Power Efficient Digital Front-End for Cognitive Radio Systems. ACSSC 2018: 199-202 - [c23]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Marco Re, Francesca Silvestri, Sergio Spanò:
Efficient Ensemble Machine Learning Implementation on FPGA Using Partial Reconfiguration. ApplePies 2018: 253-259 - [c22]Marco Ottavi, Dario Asciolla, Tiziano Fiorucci, Elena Grosso, Carla Marzullo, Alessandro Scaramella, Simone Stramaccioni, Alessia Zibecchi, Carla Andreani, Gian Carlo Cardarilli, Carlo Cazzaniga, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Pedro Reviriego, Gianluca Furano, Roberto Senesi:
Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility. DTIS 2018: 1-4 - [c21]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Dario Gelfusa, Marco Matta, Alberto Nannarelli, Marco Re, Lorenzo Simone, Sergio Spanò:
Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker. SMACD 2018: 1-20 - [i1]Simone Acciarito, Gian Carlo Cardarilli, Alessandro Cristini, Luca Di Nunzio, Rocco Fazzolari, Gaurav Mani Khanal, Marco Re, Gianluca Susi:
Hardware design of LIF with Latency neuron model with memristive STDP synapses. CoRR abs/1804.00149 (2018) - 2017
- [j1]Simone Acciarito, Gian Carlo Cardarilli, Alessandro Cristini, Luca Di Nunzio, Rocco Fazzolari, Gaurav Mani Khanal, Marco Re, Gianluca Susi:
Hardware design of LIF with Latency neuron model with memristive STDP synapses. Integr. 59: 81-89 (2017) - [c20]Gian Carlo Cardarilli, Luca Di Nunzio, Federico Massimi, Rocco Fazzolari, Carlo De Petris, Giuseppe Augugliaro, Canio Mennuti:
A Wireless Sensor Node for Acoustic Emission Non-destructive Testing. ApplePies 2017: 1-7 - [c19]Francesca Silvestri, Simone Acciarito, Gian Carlo Cardarilli, Gaurav Mani Khanal, Luca Di Nunzio, Rocco Fazzolari, Marco Re:
FPGA Implementation of a Low-Power QRS Extractor. ApplePies 2017: 9-15 - [c18]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Luca Gerardi, Marco Re, Giovanni Campolo, Domenico Cascone:
A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements. ISCAS 2017: 1-4 - [c17]Alberto Nannarelli, Marco Re, Gian Carlo Cardarilli, Luca Di Nunzio, M. Spaziani Brunella, Rocco Fazzolari, F. Carbonari:
Robust throughput boosting for low latency dynamic partial reconfiguration. SoCC 2017: 86-90 - 2016
- [c16]A. Esposito, Andrea Lomuscio, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re:
Dynamically-loaded Hardware Libraries (HLL) technology for audio applications. ACSSC 2016: 882-886 - [c15]Gaurav Mani Khanal, Simone Acciarito, Gian Carlo Cardarilli, Abhishek Chakraborty, Luca Di Nunzio, Rocco Fazzolari, Alessandro Cristini, Gianluca Susi, Marco Re:
ZnO-rGO Composite Thin Film Resistive Switching Device: Emulating Biological Synapse Behavior. ApplePies 2016: 117-123 - [c14]Simone Acciarito, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Gaurav Mani Khanal, Marco Re:
Compressive Sensing Reconstruction for Complex System: A Hardware/Software Approach. ApplePies 2016: 192-200 - [c13]Filippo Giuliani, Marco Ottavi, Gian Carlo Cardarilli, Marco Re, Luca Di Nunzio, Rocco Fazzolari, Antimo Bruno, Francesco Zuliani:
Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams. DFT 2016: 111-114 - 2015
- [c12]Simone Acciarito, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re:
A Wireless Sensor Node Based on Microbial Fuel Cell. ApplePies 2015: 143-150 - 2014
- [c11]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re:
TDES cryptography algorithm acceleration using a reconfigurable functional unit. ICECS 2014: 419-422 - 2013
- [c10]Gian Carlo Cardarilli, Alessandro Cristini, Luca Di Nunzio, Marco Re, Mario Salerno, Gianluca Susi:
Spiking neural networks based on LIF with latency: Simulation and synchronization effects. ACSSC 2013: 1838-1842 - [c9]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Salvatore Pontarelli, Marco Re:
A Reconfigurable Functional Unit for Modular Operations. ApplePies 2013: 141-152 - 2012
- [c8]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Ruby B. Lee:
Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving. ACSCC 2012: 1457-1459 - 2011
- [c7]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re:
Fine-grain Reconfigurable Functional Unit for embedded processors. ACSCC 2011: 488-492 - 2010
- [c6]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Christian Lenci, Marco Re:
VLSI implementation of reconfigurable cells for RFU in embedded processors. ICECS 2010: 1180-1183 - [c5]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re:
Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit. WISES 2010: 6-11
2000 – 2009
- 2009
- [c4]Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re:
Arithmetic/Logic Blocks for Fine-grained Reconfigurable Units. ISCAS 2009: 2001-2004 - [c3]Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re:
Speed-up of RISC Processor Computation using ADAPTO. ISCAS 2009: 2229-2232 - 2008
- [c2]Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re:
A full-adder based reconfigurable architecture for fine grain applications: ADAPTO. ICECS 2008: 1304-1307 - [c1]Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, Alberto Nannarelli:
ADAPTO: full-adder based reconfigurable architecture for bit level operations. ISCAS 2008: 3434-3437
Coauthor Index
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last updated on 2024-10-12 23:00 CEST by the dblp team
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