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ORCIDPeter P. Puschner
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- affiliation: Vienna University of Technology, Austria
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2020 – today
- 2024
[j22]Emad Jacob Maroun
, Martin Schoeberl, Peter P. Puschner:
Predictable and optimized single-path code for predicated processors. J. Syst. Archit. 154: 103214 (2024)- [c102]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Two-Step Register Allocation for Implementing Single-Path Code. ISORC 2024: 1-12 - [c101]Emad Jacob Maroun, Eva Dengler, Christian Dietrich, Stefan Hepp, Henriette Herzog, Benedikt Huber, Jens Knoop, Daniel Wiltsche-Prokesch, Peter P. Puschner, Phillip Raffeck, Martin Schoeberl, Simon Schuster, Peter Wägemann:
The Platin Multi-Target Worst-Case Analysis Tool. WCET 2024: 2:1-2:14 - 2023
- [j21]Raimund Kirner, Peter P. Puschner:
A qualitative cybersecurity analysis of time-triggered communication networks in automotive systems. J. Syst. Archit. 136: 102835 (2023) - [c100]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Compiler-Directed Constant Execution Time on Flat Memory Systems. ISORC 2023: 64-75 - [c99]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Constant-Loop Dominators for Single-Path Code Optimization. WCET 2023: 7:1-7:13 - 2021
- [j20]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Compiling for time-predictability with dual-issue single-path code. J. Syst. Archit. 118: 102230 (2021) - [j19]Raimund Kirner, Peter P. Puschner:
A Quantitative Analysis of Interfaces to Time-Triggered Communication Buses. IEEE/ACM Trans. Netw. 29(4): 1786-1797 (2021) - [c98]Michael Platzer, Peter P. Puschner:
Vicuna: A Timing-Predictable RISC-V Vector Coprocessor for Scalable Parallel Computation. ECRTS 2021: 1:1-1:18 - [c97]Eleftherios Kyriakakis, Jens Sparsø, Peter P. Puschner, Martin Schoeberl:
Synchronizing Real-Time Tasks in Time-Triggered Networks. ISORC 2021: 11-19 - [c96]Michael Platzer, Peter P. Puschner:
A Processor Extension for Time-Predictable Code Execution. ISORC 2021: 34-42 - [c95]Raimund Kirner, Peter P. Puschner:
Zeitgesteuerte Kommunikationsschnittstellen in unterschiedlichen Anwendungskontexten. Echtzeit 2021: 93-102 - 2020
- [j18]Peter P. Puschner, Raimund Kirner:
Asynchronous vs. synchronous interfacing to time-triggered communication systems. J. Syst. Archit. 103: 101690 (2020) - [c94]Eleftherios Kyriakakis, Jens Sparsø, Peter P. Puschner, Martin Schoeberl:
Synchronizing Real-Time Tasks in Time-Aware Networks: Work-in-Progress. EMSOFT 2020: 15-17 - [c93]Michael Platzer, Peter P. Puschner:
A Real-Time Application with Fully Predictable Task Timing. ISORC 2020: 43-46 - [c92]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Towards Dual-Issue Single-Path Code. ISORC 2020: 176-183 - [c91]Michael Platzer, Peter P. Puschner:
An Instruction Filter for Time-Predictable Code Execution on Standard Processors. SAFECOMP Workshops 2020: 111-122
2010 – 2019
- 2019
- [c90]Peter P. Puschner, Raimund Kirner:
Interfacing to Time-Triggered Communication Systems. ISORC 2019: 201-208 - [c89]Peter P. Puschner, Bernhard Frömel:
Composable Component Interfaces for Time-Triggered Systems. MECO 2019: 1-4 - [c88]Siddhartha Verma, Thomas Gruber, Christoph Schmittner, Peter P. Puschner:
Combined Approach for Safety and Security. SAFECOMP Workshops 2019: 87-101 - 2018
- [c87]Siddhartha Verma, Thomas Gruber, Peter P. Puschner, Christoph Schmittner, Erwin Schoitsch:
A Quantitative Approach for the Likelihood of Exploits of System Vulnerabilities. SAFECOMP Workshops 2018: 177-189 - 2017
- [c86]Bekim Cilku, Wolfgang Puffitsch, Daniel Prokesch, Martin Schoeberl, Peter P. Puschner:
Improving Performance of Single-Path Code through a Time-Predictable Memory Hierarchy. ISORC 2017: 76-83 - [c85]Dieter Steiner, Peter P. Puschner:
Error detection based on execution-time monitoring. MECO 2017: 1-5 - [c84]Martin Schoeberl, Bekim Cilku, Daniel Prokesch, Peter P. Puschner:
Best Practice for Caching of Single-Path Code. WCET 2017: 2:1-2:12 - 2016
- [c83]Peter P. Puschner, Bekim Cilku, Daniel Prokesch:
Constructing Time-Predictable MPSoCs: Avoid Conflicts in Temporal Control. MCSoC 2016: 321-328 - [c82]Christoph Schmittner, Zhendong Ma, Carolina Reyes, Oliver Dillinger, Peter P. Puschner:
Using SAE J3061 for Automotive Security Requirement Engineering. SAFECOMP Workshops 2016: 157-170 - [c81]Christoph Schmittner, Zhendong Ma, Peter P. Puschner:
Limitation and Improvement of STPA-Sec for Safety and Security Co-analysis. SAFECOMP Workshops 2016: 195-209 - 2015
- [j17]Martin Schoeberl, Sahar Abbaspour, Benny Akesson, Neil C. Audsley, Raffaele Capasso, Jamie Garside, Kees Goossens, Sven Goossens, Scott Hansen, Reinhold Heckmann, Stefan Hepp, Benedikt Huber, Alexander Jordan, Evangelia Kasapaki, Jens Knoop, Yonghui Li, Daniel Prokesch, Wolfgang Puffitsch, Peter P. Puschner, André Rocha, Cláudio Silva, Jens Sparsø, Alessandro Tocchi:
T-CREST: Time-predictable multi-core architecture for embedded systems. J. Syst. Archit. 61(9): 449-471 (2015) - [j16]Bekim Cilku, Roland Kammerer, Peter P. Puschner:
Aligning single path loops to reduce the number of capacity cache misses. SIGBED Rev. 12(1): 13-18 (2015) - [j15]Bekim Cilku, Peter P. Puschner:
Designing a time predictable memory hierarchy for single-path code. SIGBED Rev. 12(2): 16-21 (2015) - [c80]Bekim Cilku, Alfons Crespo, Peter P. Puschner, Javier Coronel, Salvador Peiró:
A TDMA-Based arbitration scheme for mixed-criticality multicore platforms. EBCCSP 2015: 1-6 - [c79]Daniel Prokesch, Stefan Hepp, Peter P. Puschner:
A Generator for Time-Predictable Code. ISORC 2015: 27-34 - [c78]Bekim Cilku, Daniel Prokesch, Peter P. Puschner:
A Time-Predictable Instruction-Cache Architecture that Uses Prefetching and Cache Locking. ISORC Workshops 2015: 74-79 - 2014
- [c77]Iban Ayestaran, Carlos Fernando Nicolás, Jon Pérez, Asier Larrucea, Peter P. Puschner:
A novel modeling framework for time-triggered safety-critical embedded systems. FDL 2014: 1-8 - [c76]Liana Musat, Markus Hubl, Andi Buzo, Georg Pelz, Susanne Kandl, Peter P. Puschner:
Semi-formal representation of requirements for automotive solutions using sysML. FDL 2014: 1-8 - [c75]Bekim Cilku, Bernhard Frömel, Peter P. Puschner:
A dual-layer bus arbiter for mixed-criticality systems with hypervisors. INDIN 2014: 147-151 - [c74]Iban Ayestaran, Carlos Fernando Nicolás, Jon Pérez, Asier Larrucea, Peter P. Puschner:
Modeling and Simulated Fault Injection for Time-Triggered Safety-Critical Embedded Systems. ISORC 2014: 180-187 - [c73]Iban Ayestaran, Carlos F. Nicolás, Jon Pérez, Peter P. Puschner:
Modeling logical execution time based safety-critical embedded systems in SystemC. MECO 2014: 77-80 - [c72]Iban Ayestaran, Carlos Fernando Nicolás, Jon Pérez, Asier Larrucea, Peter P. Puschner:
A Simulated Fault Injection Framework for Time-Triggered Safety-Critical Embedded Systems. SAFECOMP 2014: 1-16 - [c71]Christoph Schmittner, Thomas Gruber, Peter P. Puschner, Erwin Schoitsch:
Security Application of Failure Mode and Effect Analysis (FMEA). SAFECOMP 2014: 310-325 - [c70]Daniel Prokesch, Benedikt Huber, Peter P. Puschner:
Towards Automated Generation of Time-Predictable Code. WCET 2014: 103-112 - 2013
- [c69]Martin Elshuber, Susanne Kandl, Peter P. Puschner:
Improving System-Level Verification of SystemC Models with SPIN. FSFMA 2013: 74-79 - [c68]Clemens B. Geyer, Benedikt Huber, Daniel Prokesch, Peter P. Puschner:
Time-predictable code execution - Instruction-set support for the single-path approach. ISORC 2013: 1-8 - [c67]Peter P. Puschner, Daniel Prokesch, Benedikt Huber, Jens Knoop, Stefan Hepp, Gernot Gebhard:
The T-CREST approach of compiler and WCET-analysis integration. ISORC 2013: 1-8 - [c66]Benedikt Huber, Daniel Prokesch, Peter P. Puschner:
Combined WCET analysis of bitcode and machine code using control-flow relation graphs. LCTES 2013: 163-172 - [c65]Peter P. Puschner:
Embedded systems for safety-critical and mixed-criticality applications. MECO 2013: 1-2 - [c64]Peter P. Puschner:
Constructing time-critical embedded systems: Decide before runtime. MECO 2013: 1 - 2012
- [c63]Peter P. Puschner, Raimund Kirner, Benedikt Huber, Daniel Prokesch:
Compiling for Time Predictability. SAFECOMP Workshops 2012: 382-391 - [c62]Benedikt Huber, Daniel Prokesch, Peter P. Puschner:
A Formal Framework for Precise Parametric WCET Formulas. WCET 2012: 91-102 - 2011
- [j14]Albrecht Kadlec, Raimund Kirner, Peter P. Puschner:
Code transformations to prevent timing anomalies. Comput. Syst. Sci. Eng. 26(6) (2011) - [j13]Andreas Ermedahl, Peter P. Puschner:
Preface to the special issue on worst-case execution-time analysis. J. Syst. Archit. 57(7): 675-676 (2011) - [c61]Bekim Cilku, Peter P. Puschner:
Using a Local Prefetch Strategy to Obtain Temporal Time Predictability. ISORC Workshops 2011: 227-233 - 2010
- [j12]Raimund Kirner, Peter P. Puschner, Adrian Prantl:
Transforming flow information during code optimization for timing analysis. Real Time Syst. 45(1-2): 72-105 (2010) - [c60]Albrecht Kadlec, Raimund Kirner, Peter P. Puschner:
Avoiding Timing Anomalies Using Code Transformations. ISORC 2010: 123-132 - [c59]Bekim Cilku, Peter P. Puschner:
Towards a Time-Predictable Hierarchical Memory Architecture - Prefetching Options to be Explored. ISORC Workshops 2010: 219-225 - [c58]Raimund Kirner, Peter P. Puschner:
Time-Predictable Computing. SEUS 2010: 23-34 - [c57]Benedikt Huber, Peter P. Puschner:
A Code Policy Guaranteeing Fully Automated Path Analysis. WCET 2010: 77-88 - [e2]Sang Lyul Min, Robert G. Pettit IV, Peter P. Puschner, Theo Ungerer:
Software Technologies for Embedded and Ubiquitous Systems - 8th IFIP WG 10.2 International Workshop, SEUS 2010, Waidhofen/Ybbs, Austria, October 13-15, 2010. Proceedings. Lecture Notes in Computer Science 6399, Springer 2010, ISBN 978-3-642-16255-8 [contents]
2000 – 2009
- 2009
- [c56]Raimund Kirner, Albrecht Kadlec, Peter P. Puschner:
Precise Worst-Case Execution Time Analysis for Processors with Timing Anomalies. ECRTS 2009: 119-128 - [c55]Peter P. Puschner, Raimund Kirner:
Model-Driven Design and Organic Computing -- Combinable Strategies?. ISORC 2009: 101 - [c54]Martin Schoeberl, Peter P. Puschner, Raimund Kirner:
A Single-Path Chip-Multiprocessor System. SEUS 2009: 47-57 - [c53]Niklas Holsti, Guillem Bernat, Christian Ferdinand, Peter P. Puschner, Reinhard Wilhelm:
Teaching WCET Analysis in Academia and Industry: A Panel Discussion. WCET 2009 - [c52]Martin Schoeberl, Peter P. Puschner:
Is Chip-Multiprocessing the End of Real-Time Scheduling?. WCET 2009 - 2008
- [j11]Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David B. Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter P. Puschner, Jan Staschulat, Per Stenström:
The worst-case execution-time problem - overview of methods and survey of tools. ACM Trans. Embed. Comput. Syst. 7(3): 36:1-36:53 (2008) - [c51]Ingomar Wenzel, Raimund Kirner, Bernhard Rieder, Peter P. Puschner:
Measurement-Based Timing Analysis. ISoLA 2008: 430-444 - [c50]Raimund Kirner, Peter P. Puschner:
Obstacles in Worst-Case Execution Time Analysis. ISORC 2008: 333-339 - [c49]Guenter Khyo, Peter P. Puschner, Martin Delvai:
An Operating System for a Time-Predictable Computing Node. SEUS 2008: 150-161 - [c48]Peter P. Puschner, Martin Schoeberl:
On Composable System Timing, Task Timing, and WCET Analysis. WCET 2008 - [c47]Bernhard Rieder, Peter P. Puschner, Ingomar Wenzel:
Using model checking to derive loop bounds of general loops within ANSI-C applications for measurement based WCET analysis. WISES 2008: 1-7 - 2007
- [c46]Bernhard Rieder, Ingomar Wenzel, Klaus Steinhammer, Peter P. Puschner:
Using a Runtime Measurement Device with Measurement-Based WCET Analysis. IESS 2007: 15-26 - [c45]Raimund Kirner, Peter P. Puschner:
Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache. ISORC 2007: 87-93 - [c44]Susanne Kandl, Raimund Kirner, Peter P. Puschner:
Automated Formal Verification and Testing of C Programs for Embedded Systems. ISORC 2007: 373-381 - [c43]Ingomar Wenzel, Raimund Kirner, Bernhard Rieder, Peter P. Puschner:
Cross-Platform Verification Framework for Embedded Systems. SEUS 2007: 137-148 - [e1]Roman Obermaisser, Yunmook Nah, Peter P. Puschner, Franz-Josef Rammig:
Software Technologies for Embedded and Ubiquitous Systems, 5th IFIP WG 10.2 International Workshop, SEUS 2007, Santorini Island, Greece, May 2007. Revised Papers. Lecture Notes in Computer Science 4761, Springer 2007, ISBN 978-3-540-75663-7 [contents] - 2006
- [j10]Moon Hae Kim, Peter P. Puschner:
Guest Editorial: Introduction to the Special Issue. Real Time Syst. 32(3): 171-173 (2006) - [j9]Jan Gustafsson, Björn Lisper, Raimund Kirner, Peter P. Puschner:
Code Analysis for Temporal Predictability. Real Time Syst. 32(3): 253-277 (2006) - [c42]Peter P. Puschner, Raimund Kirner:
From Time-Triggered to Time-Deterministic Real-Time Systems. DIPES 2006: 115-124 - [c41]Raimund Kirner, Peter P. Puschner, Ingomar Wenzel, Bernhard Rieder:
Portable Data Exchange for Remote-Testing Frameworks. ISORC 2006: 476-484 - [c40]Raimund Kirner, Markus Grössing, Peter P. Puschner:
Comparing WCET and Resource Demands of Trigonometric Functions Implemented as Iterative Calculations vs. Table-Lookup. WCET 2006 - [c39]Susanne Kandl, Raimund Kirner, Peter P. Puschner:
Development of a Framework for Automated Systematic Testing of Safety-Critical Embedded Systems. WISES 2006: 65-77 - 2005
- [j8]Peter P. Puschner:
Guest Editorial. Real Time Syst. 30(1-2): 5-6 (2005) - [c38]Ingomar Wenzel, Bernhard Rieder, Raimund Kirner, Peter P. Puschner:
Automatic Timing Model Generation by CFG Partitioning and Model Checking. DATE 2005: 606-611 - [c37]Raimund Kirner, Peter P. Puschner:
Classification of WCET Analysis Techniques. ISORC 2005: 190-199 - [c36]Ingomar Wenzel, Raimund Kirner, Peter P. Puschner, Bernhard Rieder:
Principles of Timing Anomalies in Superscalar Processors. QSIC 2005: 295-306 - [c35]Ingomar Wenzel, Raimund Kirner, Bernhard Rieder, Peter P. Puschner:
Measurement-Based Worst-Case Execution Time Analysis. SEUS 2005: 7-10 - [c34]Raimund Kirner, Peter P. Puschner:
Classification of Code Annotations and Discussion of Compiler-Support for Worst-Case Execution Time Analysis. WCET 2005 - [c33]Peter P. Puschner:
Experiments with WCET-Oriented Programming and the Single-Path Architecture. WORDS 2005: 205-210 - 2004
- [c32]Stefan Pitzek, Peter P. Puschner:
Function Test Environment for Embedded Driver Components. ISORC 2004: 237-244 - 2003
- [j7]Andy J. Wellings, Peter P. Puschner:
Evaluating the Expressive Power of the Real-Time Specification for Java. Real Time Syst. 24(3): 319-359 (2003) - [c31]Martin Delvai, Wolfgang Huber, Peter P. Puschner, Andreas Steininger:
Processor Support for Temporal Predictability - The SPEAR Design Example. ECRTS 2003: 169-176 - [c30]Janosch Fauster, Raimund Kirner, Peter P. Puschner:
Intelligent Editor for Writing Worst-Case-Execution-Time-Oriented Programs. EMSOFT 2003: 190-205 - [c29]Peter P. Puschner:
Hard Real-Time Programming is Different. IPDPS 2003: 116 - [c28]Raimund Kirner, Peter P. Puschner:
Transformation of Meta-Information by Abstract Co-interpretation. SCOPES 2003: 298-312 - [c27]Raimund Kirner, Peter P. Puschner:
Discussion of Misconceptions about WCET Analysis. WCET 2003: 61-64 - [c26]Raimund Kirner, Peter P. Puschner:
A Simple and Efficient Fully Automatic Worst-Case Execution Time Analysis for Model-Based Application Development. WISES 2003: 15-24 - [c25]Stefan Pitzek, Peter P. Puschner:
Function Test Framework for Testing IO-Blocks in a Model-Based Rapid Prototyping Development Environment for Embedded Control Applications. WISES 2003: 85-96 - [c24]Peter P. Puschner:
Algorithms for Dependable Hard Real-Time Systems. WORDS 2003: 26-31 - [c23]Jan Gustafsson, Björn Lisper, Raimund Kirner, Peter P. Puschner:
Input-Dependency Analysis for Hard Real-Time Software. WORDS Fall 2003: 53-60 - [c22]Raimund Kirner, Peter P. Puschner:
Timing Analysis of Optimised Code. WORDS 2003: 100-105 - [c21]Peter P. Puschner, Raimund Kirner:
Avoiding Timing Problems in Real-Time Software. WSTFES 2003: 75-78 - 2002
- [c20]Raimund Kirner, Roland Lang, Gerald Freiberger, Peter P. Puschner:
Fully Automatic Worst-Case Execution Time Analysis for Matlab/Simulink Models. ECRTS 2002: 31-40 - [c19]Peter P. Puschner:
Transforming Execution-Time Boundable Code into Temporally Predictable Code. DIPES 2002: 163-172 - [c18]Iain Bate, Guillem Bernat, Peter P. Puschner:
Java Virtual-Machine Support for Portable Worst-Case Execution-Time Analysis. Symposium on Object-Oriented Real-Time Distributed Computing 2002: 83-90 - [c17]Peter P. Puschner, Alan Burns:
Writing Temporally Predictable Code. WORDS 2002: 85-94 - 2001
- [c16]Raimund Kirner, Peter P. Puschner:
Transformation of Path Information for WCET Analysis during Compilation. ECRTS 2001: 29-36 - [c15]Peter P. Puschner, Guillem Bernat:
WCET Analysis of Reusable Portable Code. ECRTS 2001: 45- - [c14]Günther Bauer, Hermann Kopetz, Peter P. Puschner:
Assumption coverage under different failure modes in the time-triggered architecture. ETFA (1) 2001: 333-341 - [c13]Peter P. Puschner, Andy J. Wellings:
A Profile for High-Integrity Real-Time Java Programs. ISORC 2001: 15-22 - [c12]Radu Dobrin, Gerhard Fohler, Peter P. Puschner:
Translating Off-Line Schedules into Task Attributes for Fixed Priority Scheduling. RTSS 2001: 225-234 - 2000
- [j6]Peter P. Puschner, Alan Burns:
Guest Editorial: A Review of Worst-Case Execution-Time Analysis. Real Time Syst. 18(2/3): 115-128 (2000) - [c11]Iain Bate, Guillem Bernat, G. Murphy, Peter P. Puschner:
Low-level analysis of a portable Java byte code WCET analysis framework. RTCSA 2000: 39-
1990 – 1999
- 1999
- [j5]Peter P. Puschner:
Real-Time Performance of Sorting Algorithms. Real Time Syst. 16(1): 63-79 (1999) - [c10]Peter P. Puschner, Alan Burns:
Time-constrained sorting-a comparison of different algorithms. ECRTS 1999: 78-85 - 1998
- [c9]Peter P. Puschner:
A tool for high-level language analysis of worst-case execution times. ECRTS 1998: 130-137 - [c8]Peter P. Puschner, Roman Nossal:
Testing the Results of Static Worst-Case Execution-Time Analysis. RTSS 1998: 134-143 - 1997
- [j4]Peter P. Puschner, Anton V. Schedl:
Computing Maximum Task Execution Times - A Graph-Based Approach. Real Time Syst. 13(1): 67-91 (1997) - [c7]Dietmar Mittermair, Peter P. Puschner:
Which sorting algorithms to choose for hard real-time applications. RTS 1997: 250-257 - [c6]Peter P. Puschner, Alexander Vrchoticky:
Problems in Static Worst-Case Execution Time Analysis. MMB (Kurzbeiträge) 1997: 18-25 - 1993
- [c5]Peter P. Puschner, Anton V. Schedl:
A Tool for the Computation of Worst Case Task Execution Times. RTS 1993: 224-229 - [c4]Hermann Kopetz, Gerhard Fohler, Günter Grünsteidl, Heinz Kantz, Gustav Pospischil, Peter P. Puschner, Johannes Reisinger, Ralf Schlatterbeck, Werner Schütz, Alexander Vrchoticky, Ralph Zainlinger:
Real-time system development: The programming model of MARS. ISADS 1993: 290-299 - 1992
- [j3]Gustav Pospischil, Peter P. Puschner, Alexander Vrchoticky, Ralph Zainlinger:
Developing Real-Time Tasks With Predictable Timing. IEEE Softw. 9(5): 35-44 (1992) - [c3]Hermann Kopetz, Gerhard Fohler, Günter Grünsteidl, Heinz Kantz, Gustav Pospischil, Peter P. Puschner, Johannes Reisinger, Ralf Schlatterbeck, Werner Schütz, Alexander Vrchoticky, Ralph Zainlinger:
The programmer's view of MARS. RTSS 1992: 223-226 - 1991
- [j2]Hermann Kopetz, Ralph Zainlinger, Gerhard Fohler, Heinz Kantz, Peter P. Puschner, Werner Schütz:
The design of real-time systems: from specification to implementation and verification. Softw. Eng. J. 6(3): 72-82 (1991) - [c2]Hermann Kopetz, Ralph Zainlinger, Gerhard Fohler, Heinz Kantz, Peter P. Puschner, Werner Schütz:
An Engineering Approach to Hard Real-Time System Design. ESEC 1991: 166-188 - 1990
- [c1]Hermann Kopetz, Heinz Kantz, Günter Grünsteidl, Peter P. Puschner, Johannes Reisinger:
Tolerating transient faults in MARS. FTCS 1990: 466-473
1980 – 1989
- 1989
- [j1]Peter P. Puschner, Christian Koza:
Calculating the Maximum Execution Time of Real-Time Programs. Real Time Syst. 1(2): 159-176 (1989)
Coauthor Index
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