"Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional ..."

Roshan Weerasekera et al. (2009)

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DOI: 10.1109/3DIC.2009.5306541

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Roshan Weerasekera, Matt Grange, Dinesh Pamunuwa, Hannu Tenhunen, Li-Rong Zheng:
Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits. 3DIC 2009: 1-8

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