"A Three Dimensional DRAM (3D DRAM) Technology for the Next Decades."

K. S. Choi et al. (2024)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46783.2024.10631471

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type: Conference or Workshop Paper

metadata version: 2024-10-17

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K. S. Choi, S. H. Kim, J. W. Seo, H. S. Kang, S. W. Chu, S. W. Bae, J. H. Kwon, G. S. Kim, Y. T. Park, J. H. Kwak, D. I. Song, S. M. Park, Y. T. Kim, K. C. Jang, J. S. Cho, H. S. Lee, B. H. Lee, J. W. Park, J. H. Lee, H. H. Kwon, D. S. You, C. S. Hyun, J. J. Lee, S. C. Lee, I. D. Kim, J. H. Myung, H. S. Won, J. H. Chun, K. H. Kim, J. H. Kang, S. B. Kim, K. H. Lee, S. O. Chung, S. S. Kim, I. S. Jin, B. K. Lee, C. W. Kim, J. Park, S. Y. Cha:
A Three Dimensional DRAM (3D DRAM) Technology for the Next Decades. VLSI Technology and Circuits 2024: 1-2

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