"A pre-silicon logic level security verification flow for higher-order ..."

Yanbin Li et al. (2020)

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DOI: 10.1016/J.VLSI.2019.09.003

access: closed

type: Journal Article

metadata version: 2025-01-19

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Yanbin Li, Ming Tang, Yuguang Li, Huanguo Zhang:
A pre-silicon logic level security verification flow for higher-order masking schemes against glitches on FPGAs. Integr. 70: 60-69 (2020)

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