"Turbo Decoder Using Contention-Free Interleaver and Parallel Architecture."

Cheng-Chi Wong et al. (2010)

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DOI: 10.1109/JSSC.2009.2038428

access: closed

type: Journal Article

metadata version: 2020-08-30

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Cheng-Chi Wong, Ming-Wei Lai, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee:
Turbo Decoder Using Contention-Free Interleaver and Parallel Architecture. IEEE J. Solid State Circuits 45(2): 422-432 (2010)

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