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ORCIDNANOARCH 2013: Brooklyn, NY, USA
- IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2013, Brooklyn, NY, USA, July 15-17, 2013. IEEE Computer Society 2013, ISBN 978-1-4799-0873-8
- Jens Bürger
, Christof Teuscher:
Variation-tolerant Computing with Memristive Reservoirs. 1-6 - Olivier Bichler, David Roclin, Christian Gamrat, Damien Querlioz:
Design exploration methodology for memristor-based spiking neuromorphic architectures with the Xnet event-driven simulator. 7-12 - Saptarshi Mandal, Branden Long, Ammaarah El-Amin, Rashmi Jha:
Doped HfO2 based nanoelectronic memristive devices for self-learning neural circuits and architecture. 13-18 - Ligang Gao, Farnood Merrikh-Bayat, Fabien Alibart, Xinjie Guo, Brian D. Hoskins, Kwang-Ting Cheng, Dmitri B. Strukov:
Digital-to-analog and analog-to-digital conversion with metal oxide memristors for ultra-low power computing. 19-22 - Santosh Khasanvis, Mostafizur Rahman, Prasad Shabadi, Pritish Narayanan, Hyung Suk Yu, Chi On Chui, Csaba Andras Moritz:
Nanowire field-programmable computing platform. 23-25 - Hiwa Mahmoudi, Thomas Windbacher, Viktor Sverdlov, Siegfried Selberherr:
MRAM-based logic array for large-scale non-volatile logic-in-memory applications. 26-27 - Mrigank Sharad, Karthik Yogendra, Kaushik Roy:
Energy efficient computing using coupled Dual-Pillar Spin Torque Nano Oscillators. 28-29 - Swaroop Ghosh:
Design methodologies for high density domain wall memory. 30-31 - Santosh Khasanvis, Sankara Narayanan Rajapandian, Prasad Shabadi, Jiajun Shi, Csaba Andras Moritz:
Embedded processors based on Spin Wave Functions (SPWFs). 32-33 - Arijit Raychowdhury:
Pulsed READ in spin transfer torque (STT) memory bitcell for lower READ disturb. 34-35 - Thomas Windbacher, Hiwa Mahmoudi, Viktor Sverdlov, Siegfried Selberherr:
Novel MTJ-based shift register for non-volatile logic applications. 36-37 - Zhijie Chen, Lu Zhang, Xiuyuan Bi, Hai Li:
A pseudo-weighted sensing scheme for memristor based cross-point memory. 38-39 - Mrigank Sharad, Rangharajan Venkatesan, Xuanyao Fong, Anand Raghunathan, Kaushik Roy:
Reading spin-torque memory with spin-torque sensors. 40-41 - Azzurra Pulimeno, Mariagrazia Graziano, Ruiyu Wang, Danilo Demarchi, Gianluca Piccinini:
Charge distribution in a molecular QCA wire based on bis-ferrocene molecules. 42-43 - Vaishnavi Nattar Ranganathan, Tina He, Srihari Rajgopal, Mehran Mehregany, Philip X.-L. Feng, Swarup Bhunia:
Nanomechanical non-volatile memory for computing at extreme. 44-45 - Catherine Gasnier, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
SATSoT: A methodology to map controllable-polarity devices on a regular fabric using SAT. 46-51 - Garrett S. Rose, Nathan R. McDonald, Lok-Kwong Yan, Bryant T. Wysocki, Karen Xu:
Foundations of memristor based PUF architectures. 52-57 - Marco Vacca, Stefano Frache, Mariagrazia Graziano, L. Di Crescenzo, Fabrizio Cairo, Maurizio Zamboni:
Automatic Place&Route of Nano-magnetic Logic circuits. 58-63 - Yibo Li, Branden Long, Saptarshi Mandal, Wenbo Chen, Rashmi Jha:
Understanding the impact of diode parameters on sneak current in 1Diode 1ReRAM crossbar architectures. 64-69 - Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao:
Analytical study of complementary memristive synchronous logic gates. 70-75 - Hadi Hajimiri, Prabhat Mishra, Swarup Bhunia, Branden Long, Yibo Li, Rashmi Jha:
Content-aware encoding for improving energy efficiency in multi-level cell resistive random access memory. 76-81 - Ying-Yu Chen, Amit Sangai, Morteza Gholipour, Deming Chen:
Schottky-barrier-type Graphene Nano-Ribbon Field-Effect Transistors: A study on compact modeling, process variation, and circuit performance. 82-88 - Hao Wu, Fabrizio Lombardi, Jie Han:
A PCM-based TCAM cell using NDR. 89-94 - Giorgio Palma, Manan Suri, Damien Querlioz, Elisa Vianello, Barbara De Salvo:
Stochastic neuron design using conductive bridge RAM. 95-100 - Kyle J. Stearns, Neal G. Anderson:
Throughput-dissipation tradeoff in partially reversible nanocomputing: A case study. 101-105 - Nivard Aymerich, Antonio Rubio:
Extending the fundamental error bounds for asymmetric error reliable computation. 106-109 - Hadi Hajimiri, Mimonah Al Qathrady, Prabhat Mishra:
Proactive thermal management using memory based computing. 110-115 - Nicholas J. Macias, Shivendra Pandey, A. Deswandikar, C. K. Kothapalli, ChangKyu Yoon, David H. Gracias, Christof Teuscher:
A cellular architecture for self-assembled 3D computational devices. 116-121 - George Razvan Voicu, Sorin Dan Cotofana:
Towards heterogenous 3D-stacked reliable computing with von Neumann multiplexing. 122-127 - Denny Lie, Kwanyeob Chae, Saibal Mukhopadhyay:
On the impact of 3D integration on high-throughput sensor information processing: A case study with image sensing. 128-133 - Mostafizur Rahman, Pritish Narayanan, Santosh Khasanvis, John Nicholson, Csaba Andras Moritz:
Experimental prototyping of beyond-CMOS nanowire computing fabrics. 134-139 - Manan Suri, Daniele Garbin, Olivier Bichler, Damien Querlioz, Dominique Vuillaume, Christian Gamrat, Barbara De Salvo:
Impact of PCM resistance-drift in neuromorphic systems and drift-mitigation strategy. 140-145 - Paolo Marconcini:
Effect of potential disorder on shot noise suppression in nanoscale devices. 146-151 - Vikram B. Suresh, Akshaya Shanmugam, Lekshmi Krishnan, Avinash Bijjal, Mostafizur Rahman, Csaba Andras Moritz:
Design of 8T-nanowire RAM array. 152-157
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