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ORCIDPrasanth Chatarasi
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2020 – today
- 2024
[c11]Jianming Tong, Anirudh Itagi, Prasanth Chatarasi, Tushar Krishna:
FEATHER: A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching. ISCA 2024: 198-214- [c10]Monodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-Hyoun Kim
, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan, Zhibin Ren, Scot Rider, Thomas Roewer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang, Vidhi Zalani, Jintao Zhang, Xin Zhang, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang:
14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC. ISSCC 2024: 254-256 - [i5]Jianming Tong, Anirudh Itagi, Prasanth Chatarasi, Tushar Krishna:
FEATHER: A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching. CoRR abs/2405.13170 (2024) - 2022
- [j3]Prasanth Chatarasi, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, Tushar Krishna, Vivek Sarkar:
Marvel: A Data-Centric Approach for Mapping Deep Learning Operators on Spatial Accelerators. ACM Trans. Archit. Code Optim. 19(1): 6:1-6:26 (2022) - [j2]Gordon Euhyun Moon, Hyoukjun Kwon, Geonhwa Jeong, Prasanth Chatarasi, Sivasankaran Rajamanickam, Tushar Krishna:
Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication. IEEE Trans. Parallel Distributed Syst. 33(4): 1002-1014 (2022) - 2021
- [b1]Prasanth Chatarasi:
Advancing Compiler Optimizations for General-Purpose & Domain-Specific Parallel Architectures. Georgia Institute of Technology, Atlanta, GA, USA, 2021 - [c9]Geonhwa Jeong, Gokcen Kestor, Prasanth Chatarasi, Angshuman Parashar, Po-An Tsai, Sivasankaran Rajamanickam, Roberto Gioiosa, Tushar Krishna:
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators. PACT 2021: 30-44 - [i4]Gordon Euhyun Moon, Hyoukjun Kwon, Geonhwa Jeong, Prasanth Chatarasi, Sivasankaran Rajamanickam, Tushar Krishna:
Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication. CoRR abs/2106.10499 (2021) - [i3]Geonhwa Jeong, Gokcen Kestor, Prasanth Chatarasi, Angshuman Parashar, Po-An Tsai, Sivasankaran Rajamanickam, Roberto Gioiosa, Tushar Krishna:
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators. CoRR abs/2109.07419 (2021) - 2020
- [j1]Hyoukjun Kwon, Prasanth Chatarasi, Vivek Sarkar, Tushar Krishna, Michael Pellauer, Angshuman Parashar:
MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Mappings. IEEE Micro 40(3): 20-29 (2020) - [c8]Prasanth Chatarasi, Stephen Neuendorffer, Samuel Bayliss, Kees A. Vissers, Vivek Sarkar:
Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine. HPEC 2020: 1-10 - [i2]Prasanth Chatarasi, Hyoukjun Kwon, Natesh Raina, Saurabh Malik, Vaisakh Haridas, Tushar Krishna, Vivek Sarkar:
MARVEL: A Decoupled Model-driven Approach for Efficiently Mapping Convolutions on Spatial DNN Accelerators. CoRR abs/2002.07752 (2020) - [i1]Prasanth Chatarasi, Stephen Neuendorffer, Samuel Bayliss, Kees A. Vissers, Vivek Sarkar:
Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine. CoRR abs/2006.01331 (2020)
2010 – 2019
- 2019
- [c7]Jeffrey S. Young, E. Jason Riedy, Thomas M. Conte, Vivek Sarkar, Prasanth Chatarasi, Sriseshan Srikanth:
Experimental Insights from the Rogues Gallery. ICRC 2019: 80-87 - [c6]Hyoukjun Kwon, Prasanth Chatarasi, Michael Pellauer, Angshuman Parashar, Vivek Sarkar, Tushar Krishna:
Understanding Reuse, Performance, and Hardware Cost of DNN Dataflow: A Data-Centric Approach. MICRO 2019: 754-768 - 2018
- [c5]Prasanth Chatarasi, Jun Shirako, Albert Cohen, Vivek Sarkar:
A Unified Approach to Variable Renaming for Enhanced Vectorization. LCPC 2018: 1-20 - [c4]Prasanth Chatarasi, Vivek Sarkar:
A Preliminary Study of Compiler Transformations for Graph Applications on the Emu System. MCHPC@SC 2018: 37-44 - 2016
- [c3]Prasanth Chatarasi, Jun Shirako, Martin Kong, Vivek Sarkar:
An Extended Polyhedral Model for SPMD Programs and Its Use in Static Data Race Detection. LCPC 2016: 106-120 - 2015
- [c2]Prasanth Chatarasi, Jun Shirako, Vivek Sarkar:
Polyhedral Optimizations of Explicitly Parallel Programs. PACT 2015: 213-226 - [c1]Prasanth Chatarasi, Vivek Sarkar:
Extending Polyhedral Model for Analysis and Transformation of OpenMP Programs. PACT 2015: 490-491
Coauthor Index
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