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Mateus Fonseca
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2020 – today
- 2021
- [c15]Henrique Ramos
, Mateus Fonseca
, Lesandro Ponciano
:
Modeling and Evaluating Personas with Software Explainability Requirements. HCI-COLLAB 2021: 136-149 - [i1]Henrique Ramos, Mateus Fonseca, Lesandro Ponciano
:
Modeling and Evaluating Personas with Software Explainability Requirements. CoRR abs/2108.04640 (2021)
2010 – 2019
- 2019
- [j1]Gustavo Ott, Eduardo A. C. da Costa
, Sérgio J. M. de Almeida, Mateus Beck Fonseca:
IIR Filter Architectures with Truncation Error Feedback for ECG Signal Processing. Circuits Syst. Signal Process. 38(1): 329-355 (2019) - [c14]Renan Soares de Andrades, Mateus Grellert
, Mateus Beck Fonseca:
Hyperparameter Tuning and its Effects on Cardiac Arrhythmia Prediction. BRACIS 2019: 562-567 - 2017
- [c13]Gustavo M. Santana
, Guilherme Paim
, Leandro M. G. Rocha
, Renato Neuenfeld, Mateus Beck Fonseca, Eduardo A. C. da Costa
, Sergio Bampi
:
Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors. ICECS 2017: 486-489 - [c12]Rafael Ferreira, Bianca Silveira, Mateus Beck Fonseca, Cláudio Machado Diniz, Eduardo A. C. da Costa
:
Low power sum of absolute differences architecture using novel hybrid adder. LASCAS 2017: 1-4 - [c11]Renato H. Neuenfeld, Mateus Beck Fonseca, Eduardo A. C. da Costa
, Jean P. Oses
:
Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies. LASCAS 2017: 1-4 - [c10]Raphael Dornelles, Guilherme Paim
, Bianca Silveira, Mateus Fonseca, Eduardo A. C. da Costa
, Sergio Bampi
:
A power-efficient 4-2 Adder Compressor topology. NEWCAS 2017: 281-284 - 2016
- [c9]Renato Neuenfeld, Mateus Fonseca, Eduardo A. C. da Costa
:
Design of optimized radix-2 and radix-4 butterflies from FFT with decimation in time. LASCAS 2016: 171-174 - [c8]Gustavo Ott, Eduardo A. C. da Costa
, Sérgio J. M. de Almeida, Mateus Fonseca:
Exploiting architectural solutions for IIR filter architecture with truncation error feedback. LASCAS 2016: 375-378 - [c7]Tiago Schiavon, Guilherme Paim
, Mateus Fonseca, Eduardo A. C. da Costa
, Sérgio J. M. de Almeida:
Exploiting adder compressors for power-efficient 2-D approximate DCT realization. LASCAS 2016: 383-386 - 2015
- [c6]Guilherme Paim
, Mateus Fonseca, Eduardo A. C. da Costa
, Sérgio J. M. de Almeida:
Power efficient 2-D rounded cosine transform with adder compressors for image compression. ICECS 2015: 348-351 - [c5]Anderson Martins, Mateus Fonseca, Eduardo A. C. da Costa
:
Optimal combination of dedicated multiplication blocks and adder trees schemes for optimized radix-2m array multipliers realization. ICECS 2015: 352-355 - [c4]Bianca Silveira, Cláudio Machado Diniz, Mateus Fonseca, Eduardo A. C. da Costa
:
SATD hardware architecture based on 8×8 Hadamard Transform for HEVC encoder. ICECS 2015: 576-579 - [c3]Vagner Guidotti, Eduardo A. C. da Costa
, Sérgio J. M. de Almeida, Mateus Fonseca:
Floating-point adaptive filter architectures for the cancelling of harmonics power line interference. ICECS 2015: 609-612 - [c2]Cláudio Machado Diniz, Mateus Beck Fonseca, Eduardo A. C. da Costa
, Sergio Bampi
:
Enhancing a HEVC interpolation filter hardware architecture with efficient adder compressors. NEWCAS 2015: 1-4
2000 – 2009
- 2005
- [c1]Mateus Fonseca, Eduardo A. C. da Costa, Sergio Bampi, José Monteiro:
Design of a radix-2m hybrid array multiplier using carry save adder format. SBCCI 2005: 172-177
Coauthor Index
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