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Pranav Vaidya
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2010 – 2019
- 2014
- [j4]Chandima Hewa Nadungodage, Yuni Xia, Pranav Vaidya, Yu Chen, Jaehwan John Lee:
Online multi-dimensional regression analysis on concept-drifting data streams. Int. J. Data Min. Model. Manag. 6(3): 217-238 (2014) - 2011
- [j3]Pranav Vaidya, Jaehwan John Lee:
A Novel Multicontext Coarse-Grained Reconfigurable Architecture (CGRA) For Accelerating Column-Oriented Databases. ACM Trans. Reconfigurable Technol. Syst. 4(2): 13:1-13:30 (2011) - 2010
- [j2]Pranav Vaidya, Jaehwan John Lee:
Multiprocessor simulation using communicating sequential processes. Int. J. Comput. Aided Eng. Technol. 2(1): 94-111 (2010) - [c8]Pranav Vaidya, Yu Chen, Jaehwan John Lee, Chandima H. Nadungodage, Yuni Xia:
A General Purpose FPGA Data Filter for Data Stream Processing. ERSA 2010: 247-250 - [c7]Pranav Vaidya, Jaehwan John Lee, Francis Bowen, Yingzi Du, Chandima H. Nadungodage, Yuni Xia:
Symbiote: a reconfigurable logic assisted data streammanagement system (RLADSMS). SIGMOD Conference 2010: 1147-1150
2000 – 2009
- 2009
- [j1]Christopher Barnes, Pranav Vaidya, Jaehwan John Lee:
An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators. IEEE Comput. Archit. Lett. 8(1): 13-16 (2009) - [c6]Pranav Vaidya, Jaehwan John Lee:
A Novel Multicontext Coarse-Grained Join Accelerator for Column-Oriented Databases. ERSA 2009: 158-164 - 2008
- [c5]Xiang Xiao, Tuo Shi, Pranav Vaidya, Jaehwan John Lee:
R-tree: A Hardware Implementation. CDES 2008: 3-9 - [c4]Pranav Vaidya, Jaehwan John Lee:
Characterization of TPC-H queries for a column-oriented database on a dual-core amd athlon processor. CIKM 2008: 1411-1412 - [c3]Pranav Vaidya, Jaehwan John Lee, Xiang Xiao:
Multiprocessor Simulation Using Communicating Sequential Processes. MSV 2008: 215-221 - 2007
- [c2]Pranav Vaidya, Jaehwan John Lee:
Design Space Exploration of Multiprocessor Systems with MultiContext Reconfigurable Co-Processors. ERSA 2007: 51-60 - [c1]Pranav Vaidya, Jaehwan John Lee:
Simulation of hybrid computer architectures: simulators, methodologies and recommendations. VLSI-SoC 2007: 157-162
Coauthor Index
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