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ORCIDStéphane Emery
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- affiliation: Swiss Center for Electronics and Microtechnology (CSEM), Neuchâtel, Switzerland
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2020 – today
- 2023
[c14]Yaoxing Chang, Petar Jokic
, Stéphane Emery, Luca Benini:
An Ultra-Low-Power Serial Implementation for Sigmoid and Tanh Using CORDIC Algorithm. DATE 2023: 1-2- 2022
- [j2]Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini:
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs. ACM Trans. Embed. Comput. Syst. 21(5): 56:1-56:36 (2022) - 2021
- [j1]Petar Jokic, Stéphane Emery, Luca Benini:
Improving Memory Utilization in Convolutional Neural Network Accelerators. IEEE Embed. Syst. Lett. 13(3): 77-80 (2021) - [c13]Komail M. H. Badami, Marc Pons Solé, Erfan Azarkhish, André Fivaz, Michaël Rapin, Olivier Chételat, Stéphane Emery:
Single-Battery Cooperative Sensors For Multi-Lead Long Term Ambulatory ECG Measurement. BioCAS 2021: 1-4 - [c12]Enric M. Calvo, Philippe Renevey, Mathieu Lemay, Andrea Bonetti, Marc Pons Solé, Régis Cattenoz, Stéphane Emery, Ricard Delgado-Gonzalo:
Ultra-low-power Physical Activity Classifier for Wearables: From Generic MCUs to ASICs. EMBC 2021: 6978-6981 - [c11]Ankita Ahuja, Komail M. H. Badami, Cédric Barbelenet, Stéphane Emery:
Comparison of Capacitive DAC Architectures for Power and Area Efficient SAR ADC Designs. ISCAS 2021: 1-5 - [c10]Petar Jokic, Stéphane Emery, Luca Benini:
Battery-Less Face Recognition at the Extreme Edge. NEWCAS 2021: 1-4 - [c9]Petar Jokic, Erfan Azarkhish, Régis Cattenoz, Engin Türetken, Luca Benini, Stéphane Emery:
A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge. VLSI Circuits 2021: 1-2 - [i2]Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini:
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs. CoRR abs/2106.12810 (2021) - 2020
- [i1]Petar Jokic, Stéphane Emery, Luca Benini:
Improving Memory Utilization in Convolutional Neural Network Accelerators. CoRR abs/2007.09963 (2020)
2010 – 2019
- 2019
- [c8]Y. Zha, Loïc Zahnd, Jiang Deng, David Ruffieux, Komail M. H. Badami, T. Mavrogordatos, Y. Matsuo, Stéphane Emery:
An Untrimmed PVT-Robust 12-bit 1-MS/s SAR ADC IP in 55nm Deeply Depleted Channel CMOS Process. A-SSCC 2019: 13-16 - [c7]Marc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi:
A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS. CICC 2019: 1-4 - [c6]Marc Pons Solé, Andre Bischof, Lorenzo Bergamini, Philippe Dallemagne, Stéphane Emery, Komail M. H. Badami, Jiang Deng, Themistoklis Mavrogordatos, Erfan Azarkhish, Loïc Zahnd, Costantino Cosentino, Marcin K. Augustyniak, Yingyun Zha:
A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control. ESSCIRC 2019: 73-76 - [c5]Jian Deng, Jean-Luc Nagel, Loïc Zahnd, Marc Pons, David Ruffieux, Claude Arm, Pascal Persechini, Stéphane Emery:
Energy-Autonomous MCU Operating in sub-VT Regime with Tightly-Integrated Energy-Harvester : A SoC for IoT smart nodes containing a MCU with minimum-energy point of 2.9pJ/cycle and a harvester with output power range from sub-µW to 4.32mW. ISLPED 2019: 1-4 - [c4]Christoph Thomas Müller, Marc Pons, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi:
Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC. PRIME 2019: 285-288 - 2018
- [c3]Petar Jokic, Stéphane Emery, Luca Benini:
BinaryEye: A 20 kfps Streaming Camera System on FPGA with Real-Time On-Device Image Recognition Using Binary Neural Networks. SIES 2018: 1-7 - 2017
- [c2]Pierre-François Rüedi, A. Bishof, Marcin K. Augustyniak, Pascal Persechini, Jean-Luc Nagel, Marc Pons, Stéphane Emery, Olivier Chételat:
Ultra low power microelectronics for wearable and medical devices. DATE 2017: 1426-1431 - 2016
- [c1]Marc Pons, Thanh-Chau Le, Claude Arm, Daniel Séverac, Jean-Luc Nagel, Marc-Nicolas Morgan, Stéphane Emery:
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation. ESSCIRC 2016: 41-44
Coauthor Index
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