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Sapan Agarwal
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2020 – today
- 2024
- [c18]Sangheon Oh, T. Patrick Xiao, Christopher H. Bennett, Patrick S. Finnegan, Sean R. Bishop, Adam S. Christensen, Adam L. Gross, Sangyong Lee, Andrew Jalbert, Leah Simakas, Joshua D. Sugar, Yiyang Li, Elliot J. Fuller, Sapan Agarwal, A. Alec Talin:
Understanding and Manipulating Electronic Noise in Electrochemical Random Access Memory for Neuromorphic Computing. DRC 2024: 1-2 - [c17]Pragnya Sudershan Nalla, Zhenyu Wang, Sapan Agarwal, T. Patrick Xiao, Christopher H. Bennett, Matthew J. Marinella, Jae-sun Seo, Yu Cao:
SHIFFT: A Scalable Hybrid In-Memory Computing FFT Accelerator. ISVLSI 2024: 130-135 - [c16]G. William Chapman, Corinne Teeter, Sapan Agarwal, T. Patrick Xiao, Park Hays, Srideep Musuvathy:
Biological Dynamics Enabling Training of Binary Recurrent Networks. NICE 2024: 1-7 - [i9]Ryan Wong, Nikita Kim, Kevin Higgs, Sapan Agarwal, Engin Ipek, Saugata Ghose, Ben Feinberg:
TCAM-SSD: A Framework for Search-Based Computing in Solid-State Drives. CoRR abs/2403.06938 (2024) - [i8]T. Patrick Xiao, Ben Feinberg, David K. Richardson, Matthew Cannon, Harsha Medu, Vineet Agrawal, Matthew J. Marinella, Sapan Agarwal, Christopher H. Bennett:
Analog fast Fourier transforms for scalable and efficient signal processing. CoRR abs/2409.19071 (2024) - 2023
- [c15]Jesse Short, Matthew Spear, Donald Wilson, William Wahby, T. Patrick Xiao, Robin Jacobs-Gedrim, Christopher H. Bennett, Nad Gilbert, Sapan Agarwal, Matthew J. Marinella:
Statistical Characterization of ReRAM Arrays for Analog In-Memory Computing. ICRC 2023: 1-5 - [c14]B. Tolleson, Christopher H. Bennett, T. Patrick Xiao, Donald Wilson, Jesse Short, J. Kim, David R. Hughart, Nad Gilbert, Sapan Agarwal, Hugh J. Barnaby, Matthew J. Marinella:
TID Response of an Analog In-Memory Neural Network Accelerator. IRPS 2023: 1-6 - [c13]T. Patrick Xiao, W. S. Wahby, Christopher H. Bennett, Park Hays, V. Agrawal, Matthew J. Marinella, Sapan Agarwal:
Enabling High-Speed, High-Resolution Space-based Focal Plane Arrays with Analog In-Memory Computing. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j7]T. Patrick Xiao, Ben Feinberg, Christopher H. Bennett, Vineet Agrawal, Prashant Saxena, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Harsha Medu, Vijay Raghavan, Ramesh Chettuvetty, Sapan Agarwal, Matthew J. Marinella:
An Accurate, Error-Tolerant, and Energy-Efficient Neural Network Inference Engine Based on SONOS Analog Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1480-1493 (2022) - [c12]Joshua E. Kim, T. Patrick Xiao, Christopher H. Bennett, Donald Wilson, Matthew Spear, Maximilian Siath, Ben Feinberg, Sapan Agarwal, Matthew J. Marinella:
Analog Neural Network Inference Accuracy in One-Selector One-Resistor Memory Arrays. ICRC 2022: 7-12 - [c11]Mark Plagge, Ben Feinberg, John McFarland, Fred Rothganger, Sapan Agarwal, Amro Awad, Clayton Hughes, Suma George Cardwell:
ATHENA: Enabling Codesign for Next-Generation AI/ML Architectures. ICRC 2022: 13-23 - [c10]Lawrence T. Clark, Alen Duvnjak, Clifford Young-Sciortino, Matthew Cannon, John S. Brunhaver, Sapan Agarwal, Jereme Neuendank, Donald Wilson, Hugh J. Barnaby, Matthew J. Marinella:
Self-correcting Flip-flops for Triple Modular Redundant Logic in a 12-nm Technology. ISCAS 2022: 1205-1209 - [c9]Shubham Nema, Justin Kirschner, Debpratim Adak, Sapan Agarwal, Ben Feinberg, Arun F. Rodrigues, Matthew J. Marinella, Amro Awad:
Eris: Fault Injection and Tracking Framework for Reliability Analysis of Open-Source Hardware. ISPASS 2022: 210-220 - [i7]Ethan Ancell, Christopher H. Bennett, Bert J. Debusschere, Sapan Agarwal, Park Hays, T. Patrick Xiao:
An out-of-distribution discriminator based on Bayesian neural network epistemic uncertainty. CoRR abs/2210.10780 (2022) - 2021
- [c8]Ben Feinberg, Ryan Wong, T. Patrick Xiao, Christopher H. Bennett, Jacob N. Rohan, Erik G. Boman, Matthew J. Marinella, Sapan Agarwal, Engin Ipek:
An Analog Preconditioner for Solving Linear Systems. HPCA 2021: 761-774 - [i6]T. Patrick Xiao, Ben Feinberg, Christopher H. Bennett, Venkatraman Prabhakar, Prashant Saxena, Vineet Agrawal, Sapan Agarwal, Matthew J. Marinella:
On the Accuracy of Analog Neural Network Inference Accelerators. CoRR abs/2109.01262 (2021) - 2020
- [j6]Sri Krishna Vadlamani, Sapan Agarwal, David T. Limmer, Steven G. Louie, Felix R. Fischer, Eli Yablonovitch:
Tunnel-FET Switching Is Governed by Non-Lorentzian Spectral Line Shape. Proc. IEEE 108(8): 1235-1244 (2020) - [j5]Aayush Ankit, Izzat El Hajj, Sai Rahul Chalamalasetti, Sapan Agarwal, Matthew J. Marinella, Martin Foltin, John Paul Strachan, Dejan S. Milojicic, Wen-Mei Hwu, Kaushik Roy:
PANTHER: A Programmable Architecture for Neural Network Training Harnessing Energy-Efficient ReRAM. IEEE Trans. Computers 69(8): 1128-1142 (2020) - [c7]Christopher H. Bennett, T. Patrick Xiao, Ryan Dellana, Ben Feinberg, Sapan Agarwal, Matthew J. Marinella, Vineet Agrawal, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Long Hinh, Swatilekha Saha, Vijay Raghavan, Ramesh Chettuvetty:
Device-aware inference operations in SONOS nonvolatile memory arrays. IRPS 2020: 1-6 - [c6]Christopher H. Bennett, Ryan Dellana, T. Patrick Xiao, Ben Feinberg, Sapan Agarwal, Suma Cardwell, Matthew J. Marinella, William Severa, Brad Aimone:
Evaluating complexity and resilience trade-offs in emerging memory inference machines. NICE 2020: 22:1-22:4 - [i5]Christopher H. Bennett, Ryan Dellana, T. Patrick Xiao, Ben Feinberg, Sapan Agarwal, Suma Cardwell, Matthew J. Marinella, William Severa, Brad Aimone:
Evaluating complexity and resilience trade-offs in emerging memory inference machines. CoRR abs/2003.10396 (2020) - [i4]Christopher H. Bennett, T. Patrick Xiao, Ryan Dellana, Vineet Agrawal, Ben Feinberg, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Long Hinh, Swatilekha Saha, Vijay Raghavan, Ramesh Chettuvetty, Sapan Agarwal, Matthew J. Marinella:
Device-aware inference operations in SONOS nonvolatile memory arrays. CoRR abs/2004.00802 (2020)
2010 – 2019
- 2019
- [j4]Tu-Thach Quach, Sapan Agarwal, Conrad D. James, Matthew J. Marinella, James B. Aimone:
Sparse Data Acquisition on Emerging Memory Architectures. IEEE Access 7: 1685-1693 (2019) - [j3]Elliot J. Fuller, Yiyang Li, Christopher H. Bennett, Scott T. Keene, Armantas Melianas, Sapan Agarwal, Matthew J. Marinella, Alberto Salleo, A. Alec Talin:
Redox transistors for neuromorphic computing. IBM J. Res. Dev. 63(6): 9:1-9:9 (2019) - [c5]Christopher H. Bennett, Diana Garland, Robin B. Jacobs-Gedrim, Sapan Agarwal, Matthew J. Marinella:
Wafer-Scale TaOx Device Variability and Implications for Neuromorphic Computing Applications. IRPS 2019: 1-4 - [i3]Sapan Agarwal, Diana Garland, John Niroula, Robin B. Jacobs-Gedrim, Alexander H. Hsia, Michael S. van Heukelom, Elliot J. Fuller, Bruce Draper, Matthew J. Marinella:
Using Floating Gate Memory to Train Ideal Accuracy Neural Networks. CoRR abs/1901.10570 (2019) - [i2]Aayush Ankit, Izzat El Hajj, Sai Rahul Chalamalasetti, Sapan Agarwal, Matthew J. Marinella, Martin Foltin, John Paul Strachan, Dejan S. Milojicic, Wen-Mei W. Hwu, Kaushik Roy:
PANTHER: A Programmable Architecture for Neural Network Training Harnessing Energy-efficient ReRAM. CoRR abs/1912.11516 (2019) - 2018
- [j2]Matthew J. Marinella, Sapan Agarwal, Alexander H. Hsia, Isaac Richter, Robin Jacobs-Gedrim, John Niroula, Steven J. Plimpton, Engin Ipek, Conrad D. James:
Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(1): 86-101 (2018) - 2017
- [c4]Robin B. Jacobs-Gedrim, Sapan Agarwal, Kathrine E. Knisely, Jim E. Stevens, Michael S. van Heukelom, David R. Hughart, John Niroula, Conrad D. James, Matthew J. Marinella:
Impact of Linearity and Write Noise of Analog Resistive Memory Devices in a Neural Algorithm Accelerator. ICRC 2017: 1-10 - [c3]Abdullah M. Zyarah, Nicholas Soures, Lydia Hays, Robin Jacobs-Gedrim, Sapan Agarwal, Matthew J. Marinella, Dhireesha Kudithipudi:
Ziksa: On-chip learning accelerator with memristor crossbars for multilevel neural networks. ISCAS 2017: 1-4 - [i1]Matthew J. Marinella, Sapan Agarwal, Alexander H. Hsia, Isaac Richter, Robin Jacobs-Gedrim, John Niroula, Steven J. Plimpton, Engin Ipek, Conrad D. James:
Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator. CoRR abs/1707.09952 (2017) - 2016
- [j1]Cory E. Merkel, Raqibul Hasan, Nicholas Soures, Dhireesha Kudithipudi, Tarek M. Taha, Sapan Agarwal, Matthew J. Marinella:
Neuromemristive Systems: Boosting Efficiency through Brain-Inspired Computing. Computer 49(10): 56-64 (2016) - [c2]Sapan Agarwal, Jeanine E. Cook, Erik DeBenedictis, Michael P. Frank, Gert Cauwenberghs, Sriseshan Srikanth, Bobin Deng, Eric R. Hein, Paul G. Rabbat, Thomas M. Conte:
Energy efficiency limits of logic and memory. ICRC 2016: 1-8 - [c1]Sapan Agarwal, Steven J. Plimpton, David R. Hughart, Alexander H. Hsia, Isaac Richter, Jonathan A. Cox, Conrad D. James, Matthew J. Marinella:
Resistive memory device requirements for a neural algorithm accelerator. IJCNN 2016: 929-938
Coauthor Index
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last updated on 2024-10-18 19:33 CEST by the dblp team
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