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ORCIDDimitrios Garyfallou
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2020 – today
- 2024
[c13]Anastasis Vagenas
, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis:
Advanced gate-level glitch modeling using ANNs. DAC 2024: 40:1-40:6- [c12]Christos Giamouzis, Dimitrios Garyfallou, Georgios I. Stamoulis, Nestoras E. Evmorfopoulos:
Low-rank balanced truncation of RLCk models via frequency-aware rational Krylov-based projection. SMACD 2024: 1-4 - [c11]Anastasis Vagenas, Dimitrios Garyfallou, Nestoras E. Evmorfopoulos, George I. Stamoulis:
A learning-based method for performance optimization of timing analysis. SMACD 2024: 1-4 - [i6]Dimitrios Garyfallou, Athanasios Stefanou, Christos Giamouzis, Moschos Antoniadis, Georgios Chararas, Konstantinos Chatzis, Dimitris Samaras, Rafaela Themeli, Anastasios Michailidis, Vasiliki Gogolou, Nikos Zachos, Nestor E. Evmorfopoulos, Thomas Noulis, Vasilis F. Pavlidis, Alkiviadis Hatzopoulos, Elpida Chatzineofytou, Yiannis Moisiadis:
MORCIC: Model Order Reduction Techniques for Electromagnetic Models of Integrated Circuits. CoRR abs/2401.10236 (2024) - [i5]Christos Giamouzis, Dimitrios Garyfallou, Nestoras E. Evmorfopoulos, George I. Stamoulis:
A low-rank balanced truncation approach for large-scale RLCk model order reduction based on extended Krylov subspace and a frequency-aware convergence criterion. CoRR abs/2411.13571 (2024) - 2023
- [c10]Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis:
A Fast Semi-Analytical Approach for Transient Electromigration Analysis of Interconnect Trees Using Matrix Exponential. ASP-DAC 2023: 1-6 - [c9]Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Dimitrios Garyfallou, Anastasis Vagenas, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
Accurate Soft Error Rate Evaluation Using Event-Driven Dynamic Timing Analysis. DFT 2023: 1-6 - [c8]Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Electromigration Stress Analysis with Rational Krylov-based Approximation of Matrix Exponential. SMACD 2023: 1-4 - [i4]Christos Giamouzis, Dimitrios Garyfallou, Anastasis Vagenas, Nestor E. Evmorfopoulos:
Reduction of large-scale RLCk models via low-rank balanced truncation. CoRR abs/2311.08478 (2023) - 2022
- [c7]Dimitrios Garyfallou, Anastasis Vagenas, Charalampos Antoniadis, Yehia Massoud, George I. Stamoulis:
Leveraging Machine Learning for Gate-level Timing Estimation Using Current Source Models and Effective Capacitance. ACM Great Lakes Symposium on VLSI 2022: 77-83 - [i3]Pavlos Stoikos, Dimitrios Garyfallou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
The Extended and Asymmetric Extended Krylov Subspace in Moment-Matching-Based Order Reduction of Large Circuit Models. CoRR abs/2204.02467 (2022) - [i2]Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis:
A Fast Semi-Analytical Approach for Transient Electromigration Analysis of Interconnect Trees using Matrix Exponential. CoRR abs/2211.10320 (2022) - 2021
- [j2]Dimitrios Garyfallou, Stavros Simoglou, Nikolaos Sketopoulos, Charalampos Antoniadis, Christos P. Sotiriou, Nestor E. Evmorfopoulos, George I. Stamoulis:
Gate Delay Estimation With Library Compatible Current Source Models and Effective Capacitance. IEEE Trans. Very Large Scale Integr. Syst. 29(5): 962-972 (2021) - [c6]Chrysostomos Chatzigeorgiou, Dimitrios Garyfallou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Exploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models. ASP-DAC 2021: 773-778 - 2020
- [c5]Dimitrios Garyfallou, Ioannis Tsiokanos, Nestor E. Evmorfopoulos, Georgios I. Stamoulis, Georgios Karakonstantis:
Accurate Estimation of Dynamic Timing Slacks using Event-Driven Simulation. ISQED 2020: 225-230 - [i1]Chrysostomos Chatzigeorgiou, Dimitrios Garyfallou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Exploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models. CoRR abs/2007.01948 (2020)
2010 – 2019
- 2019
- [c4]Dimitrios Garyfallou, Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Sparsity-Aware MOR Methodology for Fast and Accurate Timing Analysis of VLSI Interconnects. SMACD 2019: 89-92 - 2018
- [c3]Charalampos Antoniadis, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
EVT-based worst case delay estimation under process variation. DATE 2018: 1333-1338 - [c2]Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Large scale circuit simulation exploiting combinatorial multigrid on massively parallel architectures. MOCAST 2018: 1-4 - [c1]Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Combinatorial Multigrid Preconditioned Iterative Method for Large Scale Circuit Simulation on GPU s. SMACD 2018: 209-212 - 2017
- [j1]Antonios N. Dadaliaris, Panagiotis Oikonomou, Maria G. Koziri, Evangelia Nerantzaki, Yannis Hatzaras, Dimitrios Garyfallou, Thanasis Loukopoulos, Georgios I. Stamoulis:
Heuristics to Augment the Performance of Tetris Legalization: Making a Fast but Inferior Method Competitive. J. Low Power Electron. 13(2): 220-230 (2017)
Coauthor Index
aka: Nestor E. Evmorfopoulos
aka: George I. Stamoulis
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