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2020 – today
- 2021
[j3]Dae-Hoon Na
, Jang-Woo Lee, Seon-Kyoo Lee, Hwasuk Cho, Junha Lee, Manjae Yang, Eunjin Song, Anil Kavala, Tongsung Kim, Dong-Su Jang, Youngmin Jo, Ji-Yeon Shin, Byung-Kwan Chun, Tae-Sung Lee, Byunghoon Jeong, Chiweon Yoon, Dongku Kang, Seungjae Lee, Jungdon Ihm, Dae-Seok Byeon, Jinyub Lee, Jai Hyuk Song:
A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage. IEEE J. Solid State Circuits 56(4): 1129-1140 (2021)- [j2]Rahul Potharaju, Terry Kim, Eunjin Song, Wentao Wu, Lev Novik, Apoorve Dave, Pouria Pirzadeh, Andrew Fogarty, Gurleen Dhody, Jiying Li, Vidip Acharya, Sinduja Ramanujam, Nicolas Bruno, César A. Galindo-Legaria, Vivek R. Narasayya, Surajit Chaudhuri, Anil Nori, Tomas Talius, Raghu Ramakrishnan:
Hyperspace: The Indexing Subsystem of Azure Synapse. Proc. VLDB Endow. 14(12): 3043-3055 (2021) - 2020
- [c2]Jang-Woo Lee, Dae-Hoon Na, Anil Kavala, Hwasuk Cho, Junha Lee, Manjae Yang, Eunjin Song, Tongsung Kim, Seon-Kyoo Lee, Dong-Su Jang, Byung-Kwan Chun, Youngmin Jo, Sunwon Jung, Doo-Il Jung, Chan-ho Kim, Daewoon Kang, Tae-Sung Lee, Byunghoon Jeong, Chiweon Yoon, Dongku Kang, Seungjae Lee, Jungdon Ihm, Dae-Seok Byeon, Jin-Yup Lee, Sangjoon Hwang, Jai Hyuk Song:
A 1.8 Gb/s/pin 16Tb NAND Flash Memory Multi-Chip Package with F-Chip of Toggle 4.0 Specification for High Performance and High Capacity Storage Systems. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j1]Bernhard Egger, Eunjin Song, Hochan Lee, Daeyong Shin:
Random test program generation for verification and validation of the Samsung Reconfigurable Processor. J. Syst. Archit. 97: 219-238 (2019) - 2018
- [c1]Bernhard Egger, Eunjin Song, Hochan Lee, Daeyoung Shin:
Verification of coarse-grained reconfigurable arrays through random test programs. LCTES 2018: 76-88
Coauthor Index
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