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ORCIDEdward Flanigan
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2010 – 2019
- 2010
[j1]Edward Flanigan, Spyros Tragoudas:
Identification of Delay Measurable PDFs Using Linear Dependency Relationships. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 1011-1015 (2010)
2000 – 2009
- 2009
- [c8]Edward Flanigan, Spyros Tragoudas, Arkan Abdulrahman:
Scalable Compact Test Pattern Generation for Path Delay Faults Based on Functions. VTS 2009: 140-145 - 2008
- [c7]Rajsekhar Adapa, Edward Flanigan, Spyros Tragoudas:
A Novel Test Generation Methodology for Adaptive Diagnosis. ISQED 2008: 242-245 - [c6]Edward Flanigan, Arkan Abdulrahman, Spyros Tragoudas:
Sequential Path Delay Fault Identification Using Encoded Delay Propagation Signatures. ISQED 2008: 633-636 - [c5]Dheepakkumaran Jayaraman, Edward Flanigan, Spyros Tragoudas:
Implicit Identification of Non-Robustly Unsensitizable Paths using Bounded Delay Model. ITC 2008: 1-10 - 2007
- [c4]Rajsekhar Adapa, Edward Flanigan, Spyros Tragoudas, Michael Laisne, Hailong Cui, Tsvetomir Petrov:
Function-Based Test Generation for (Non-Robust) Path Delay Faults Using the Launch-off-Capture Scan Architecture. ISQED 2007: 717-722 - [c3]Edward Flanigan, Spyros Tragoudas:
Enhanced Identification of Strong Robustly Testable Paths. ISQED 2007: 729-736 - [c2]Edward Flanigan, Rajsekhar Adapa, Hailong Cui, Michael Laisne, Spyros Tragoudas, Tsvetomir Petrov:
Function-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture. VLSI Design 2007: 805-812 - 2006
- [c1]Edward Flanigan, Themistoklis Haniotakis, Spyros Tragoudas:
An Improved Method for Identifying Linear Dependencies in Path Delay Faults. ISQED 2006: 457-462
Coauthor Index
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