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Ning Ning 0002
Person information
- affiliation: University of Electronic Science and Technology of China, State Key Laboratory of Electronic Thin Films and Integrated Devices, Chengdu, China
Other persons with the same name
- Ning Ning — disambiguation page
- Ning Ning 0001 — A*STAR, Data Storage Institute, Singapore
- Ning Ning 0003 — University of Michigan, Department of Statistics, Ann Arbor, MI, USA (and 1 more)
- Ning Ning 0004 — Sichuan University, West China Hospital, Chengdu, China
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2020 – today
- 2024
- [j36]Yue Zuo, Ning Ning, Guanchao Qiao, J. H. Wu, Junhan Bao, X. Y. Zhang, J. Bai, F. H. Wu, Yang Liu, Qi Yu, Shaogang Hu:
Floating-Point Approximation Enabling Cost-Effective and High-Precision Digital Implementation of FitzHugh-Nagumo Neural Networks. IEEE Trans. Biomed. Circuits Syst. 18(2): 347-360 (2024) - [j35]Guanchao Qiao, Ning Ning, Yue Zuo, Pujun Zhou, Mingliang Sun, Shaogang Hu, Qi Yu, Yang Liu:
Spatio-Temporal Fusion Spiking Neural Network for Frame-Based and Event-Based Camera Sensor Fusion. IEEE Trans. Emerg. Top. Comput. Intell. 8(3): 2446-2456 (2024) - [c16]Ruichen Ma, Guanchao Qiao, Yian Liu, Liwei Meng, Ning Ning, Yang Liu, Shaogang Hu:
A&B BNN: Add&Bit-Operation-Only Hardware-Friendly Binary Neural Network. CVPR 2024: 5704-5713 - [c15]Zhong Zhang, Zhangyuan Xie, Qi Yu, Kejun Wu, Jing Li, Ning Ning:
An Adaptive Common-Mode Cancellation Biopotential Amplifier for Two-Electrode Dynamic ECG Recording. ISCAS 2024: 1-5 - [i1]Ruichen Ma, Guanchao Qiao, Yian Liu, Liwei Meng, Ning Ning, Yang Liu, Shaogang Hu:
A&B BNN: Add&Bit-Operation-Only Hardware-Friendly Binary Neural Network. CoRR abs/2403.03739 (2024) - 2023
- [j34]Wentao Han, Qi Yu, Kejun Wu, Zhong Zhang, Jing Li, Ning Ning:
A programmable analog front-end with independent biasing technique for ECG signal acquisition. Microelectron. J. 136: 105792 (2023) - [j33]Zhong Zhang, Ming Cheng, Yihu Yu, Qi Yu, Kejun Wu, Ning Ning:
A 0.053 mm2 10-bit 10-ks/s 40-nW SAR ADC with pseudo single ended switching procedure for bio-related applications. Microelectron. J. 139: 105868 (2023) - [j32]Kejun Wu, Yangchen Xie, Shubo Tao, Zhong Zhang, Ning Ning, Jing Li, Qi Yu:
A 3-5 GHz, 108fs-RMS jitter, clock receiver circuit for time-interleaved ADCs with a sampling rate of 4 GS/s. Microelectron. J. 139: 105889 (2023) - [j31]Jing Li, Bowen Yao, Lin Fan, Tianci Zhang, Yixin Zhang, Kejun Wu, Zhong Zhang, Qihui Zhang, Yan Wang, Ning Ning, Qi Yu:
A 20 nW +0.8°C/-0.8°C Inaccuracy (3σ) Leakage-Based CMOS Temperature Sensor With Supply Sensitivity of 0.9°C/V. IEEE Trans. Circuits Syst. I Regul. Pap. 70(8): 3142-3153 (2023) - [c14]Jun Huang, Ning Ning, Renxiong Li, Qi Ding, Yutuo Guo, Yu Wang, Kunqin He, Yaxin Liu, Lulu Peng:
An Ultra-Low Specific On-Resistance LDMOS With Segmented LOCOS In 0.18 μm BCD Process Platform. ASICON 2023: 1-3 - [c13]Jing Li, Penghao Jiang, Tianci Zhang, Yingchen Liu, Zhong Zhang, Qihui Zhang, Ning Ning, Qi Yu:
A Programmable High-Voltage Pulse Transmitter Circuit for 3-D Miniature Ultrasound Probes. ASICON 2023: 1-4 - [c12]Jing Li, Luhan Yang, Dongjian Chen, Zhong Zhang, Qihui Zhang, Ning Ning, Qi Yu:
Ultra-low-power and High-accuracy CMOS Temperature Sensor. ASICON 2023: 1-4 - [c11]Jing Li, Tianci Zhang, Yingchen Liu, Penghao Jiang, Zhong Zhang, Qihui Zhang, Ning Ning, Qi Yu:
A 59.99dB SNDR 1.13mW Ping-pong NS SAR ADC for 3-D Transesophageal Echocardiography. ASICON 2023: 1-4 - 2022
- [j30]Qihui Zhang, Ning Ning, Zhong Zhang, Jing Li, Kejun Wu, Yong Chen, Qi Yu:
A 13-Bit ENOB Third-Order Noise-Shaping SAR ADC Employing Hybrid Error Control Structure and LMS-Based Foreground Digital Calibration. IEEE J. Solid State Circuits 57(7): 2181-2195 (2022) - [j29]Ting Sun, Qi Yu, Daiguo Xu, Jing Li, Kejun Wu, Zhong Zhang, Yun Pang, Yan Wang, Ning Ning:
A 12bit 250 MS/s 5.43fJ/conversion-step SAR ADC with adaptive asynchronous logic in 28 nm CMOS. Microelectron. J. 128: 105572 (2022) - [j28]Shaogang Hu, Guanchao Qiao, X. K. Liu, Y. H. Liu, C. M. Zhang, Yue Zuo, Pujun Zhou, Yian Liu, Ning Ning, Qi Yu, Yang Liu:
A Co-Designed Neuromorphic Chip With Compact (17.9K F2) and Weak Neuron Number-Dependent Neuron/Synapse Modules. IEEE Trans. Biomed. Circuits Syst. 16(6): 1250-1260 (2022) - [j27]Zhong Zhang, Qi Yu, Qihui Zhang, Jing Li, Kejun Wu, Ning Ning:
A Code-Recombination Algorithm-Based ADC With Feature Extraction for WBSN Applications. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 134-142 (2022) - [j26]Qihui Zhang, Ning Ning, Zhong Zhang, Jing Li, Kejun Wu, Qi Yu:
A 12-Bit Two-Step Single-Slope ADC With a Constant Input-Common-Mode Level Resistor Ramp Generator. IEEE Trans. Very Large Scale Integr. Syst. 30(5): 644-655 (2022) - 2021
- [j25]Guanchao Qiao, Ning Ning, Yue Zuo, Shaogang Hu, Qi Yu, Y. Liu:
Direct training of hardware-friendly weight binarized spiking neural network with surrogate gradient learning towards spatio-temporal event-based dynamic data recognition. Neurocomputing 457: 203-213 (2021) - [j24]Jing Li, Yuyu Lin, Ning Ning, Qi Yu:
A +0.44°C/-0.4°C Inaccuracy Temperature Sensor With Multi-Threshold MOSFET-Based Sensing Element and CMOS Thyristor-Based VCO. IEEE Trans. Circuits Syst. I Regul. Pap. 68(3): 1102-1113 (2021) - [j23]Qihui Zhang, Ning Ning, Jing Li, Qi Yu, Kejun Wu, Zhong Zhang:
A Second-Order Noise-Shaping SAR ADC Using Two Passive Integrators Separated by the Comparator. IEEE Trans. Very Large Scale Integr. Syst. 29(1): 227-231 (2021) - [c10]Jing Li, Hang Xiao, Qihui Zhang, Zhong Zhang, Wenjie Huang, Ning Ning, Qi Yu:
A Second-Order Passive Noise-Shaping SAR ADC Using the LMS-Based Mismatch Calibration. ASICON 2021: 1-4 - [c9]Qihui Zhang, Jing Li, Zhong Zhang, Kejun Wu, Ning Ning, Qi Yu:
A13b-ENOB Third-Order Noise-Shaping SAR ADC using a Hybrid Error-Control Structure. CICC 2021: 1-2 - 2020
- [j22]Qihui Zhang, Ning Ning, Jing Li, Qi Yu, Kejun Wu, Zhong Zhang:
A 12-Bit Column-Parallel Two-Step Single-Slope ADC With a Foreground Calibration for CMOS Image Sensors. IEEE Access 8: 172467-172480 (2020) - [j21]Zhong Zhang, Qi Yu, Qihui Zhang, Ning Ning, Jing Li:
A Kalman filtering based adaptive threshold algorithm for QRS complex detection. Biomed. Signal Process. Control. 58: 101827 (2020) - [j20]Guanchao Qiao, Shaogang Hu, Tupei Chen, L. M. Rong, Ning Ning, Qi Yu, Y. Liu:
STBNN: Hardware-friendly spatio-temporal binary neural network with high pattern recognition accuracy. Neurocomputing 409: 351-360 (2020) - [j19]Kejun Wu, Jing Li, Xiangzhan Wang, Ning Ning, Kaikai Xu, Qi Yu:
Switching sequence optimization for gradient errors compensation in the current-steering DAC design. Microelectron. J. 95 (2020) - [j18]Ting Sun, Qi Yu, Ning Ning, Kejun Wu, Zhong Zhang, Jing Li:
A nano-watt power-on reset circuit with Brown-Out detection capability. Microelectron. J. 105: 104898 (2020) - [j17]Qihui Zhang, Jing Li, Ning Ning, Qi Yu, Kejun Wu, Zhong Zhang:
A second-order noise-shaping SAR ADC with error-feedback structure and data weighted averaging. Microelectron. J. 105: 104905 (2020) - [j16]Jian Luo, Yang Liu, Jing Li, Ning Ning, Kejun Wu, Zhen Liu, Qi Yu:
A Low Voltage and Low Power 10-bit Non-Binary 2b/Cycle Time and Voltage Based SAR ADC. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(4): 1136-1148 (2020) - [j15]Zhong Zhang, Qi Yu, Jing Li, Xiangzhan Wang, Ning Ning:
A 12-Bit Dynamic Tracking Algorithm-Based SAR ADC With Real-Time QRS Detection. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 2923-2933 (2020) - [j14]Qihui Zhang, Ning Ning, Jing Li, Qi Yu, Zhong Zhang, Kejun Wu:
A High Area-Efficiency 14-bit SAR ADC With Hybrid Capacitor DAC for Array Sensors. IEEE Trans. Circuits Syst. 67-I(12): 4396-4408 (2020) - [c8]Zhong Zhang, Jing Li, Qihui Zhang, Ning Ning, Qi Yu:
A 10-Bit Fully-Predictive ADC with Code-Recombination Algorithm in Transducing Sensor Node Signals. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j13]Chunming Qiao, Shaogang Hu, Junjie Wang, C. M. Zhang, Tupei Chen, Ning Ning, Qi Yu, Yang Liu:
A Neuromorphic-Hardware Oriented Bio-Plausible Online-Learning Spiking Neural Network Model. IEEE Access 7: 71730-71740 (2019) - [j12]Jian Luo, Jing Li, Shuangyi Wu, Ning Ning, Yang Liu:
A Bandwidth Mismatch Optimization Technique in Time-Interleaved Analog-to-Digital Converters. J. Circuits Syst. Comput. 28(6): 1950090:1-1950090:15 (2019) - [j11]Jing Li, Xin Ye, Jian Luo, Ning Ning, Qi Yu:
A Full-Band Timing Mismatch Calibration Technique in Time-Interleaved ADCs. J. Circuits Syst. Comput. 28(6): 1950092:1-1950092:14 (2019) - [j10]Zhong Zhang, Qi Yu, Ning Ning, Qihui Zhang, Jing Li:
Predictive SAR ADC with two-step loading technology for energy reduction. Microelectron. J. 93 (2019) - [c7]Wenjie Huang, Qihui Zhang, Jing Li, Zhong Zhang, Heng Deng, Ning Ning, Qi Yu:
A Calibration Technique for Two-Step Single-Slope Analog-to-Digital Converter. ASICON 2019: 1-4 - [c6]Jian Luo, Jing Li, Ning Ning, Kejun Wu, Zhen Liu, Yang Liu, Qi Yu:
A Low Voltage 10-Bit Non-Binary 2B/Cycle Time and Voltage Based SAR ADC. ISCAS 2019: 1-5 - [c5]Qihui Zhang, Jing Li, Zhong Zhang, Kejun Wu, Ning Ning, Qi Yu:
A Low-Power and Area-Efficient 14-bit SAR ADC with Hybrid CDAC for Array Sensors. ISCAS 2019: 1-5 - 2018
- [j9]Jian Luo, Jing Li, Ning Ning, Yang Liu, Qi Yu:
The Effects of Comparator Dynamic Capacitor Mismatch in SAR ADC and Correction. IEEE Access 6: 7037-7043 (2018) - [j8]Zhong Zhang, Jing Li, Qihui Zhang, Kejun Wu, Ning Ning, Qi Yu:
A Dynamic Tracking Algorithm Based SAR ADC in Bio-Related Applications. IEEE Access 6: 62166-62173 (2018) - [j7]Jian Luo, Jing Li, Ning Ning, Yang Liu, Qi Yu:
A 0.9-V 12-bit 100-MS/s 14.6-fJ/Conversion-Step SAR ADC in 40-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 1980-1988 (2018) - [c4]Jing Li, Jian Luo, Yongfeng Ding, Ning Ning:
A Supply Noise Compensation Circuit for Clock Buffers to Reduce Timing Jitter. APCCAS 2018: 86-89 - 2015
- [j6]Zhentao Xu, Wei Wang, Ning Ning, Wei Meng Lim, Yang Liu, Qi Yu:
A Supply Voltage and Temperature Variation-Tolerant Relaxation Oscillator for Biomedical Systems Based on Dynamic Threshold and Switched Resistors. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 786-790 (2015) - [c3]D. J. Yu, Qi Yu, Ning Ning, Y. Liu, Z. Y. Shi:
Hybrid LED driver for multi-channel output with high consistency. ASICON 2015: 1-4 - 2014
- [j5]Ling Du, Ning Ning, Shuangyi Wu, Qi Yu, Yang Liu:
A digital background calibration technique for SAR ADC based on capacitor swapping. IEICE Electron. Express 11(12): 20140325 (2014) - [j4]Ning Ning, Ling Du, Hua Chen, Shuangyi Wu, Qi Yu, Yang Liu:
A dithering Technique for Sha_less Pipelined ADC. J. Circuits Syst. Comput. 23(1) (2014) - [j3]Ning Ning, Zhiling Sui, Jing Li, Shuangyi Wu, Hua Chen, Shuangheng Xu, Qi Yu:
Multiscaling coefficients Technique for gain error Background Calibration in Pipelined ADC. J. Circuits Syst. Comput. 23(3) (2014) - [j2]Jing Li, Yang Liu, Shuangyi Wu, Ning Ning, Qi Yu:
Digital Background Calibration for Timing skew in Time-Interleaved ADC. J. Circuits Syst. Comput. 23(8) (2014) - [j1]Jing Li, Shuangyi Wu, Yang Liu, Ning Ning, Qi Yu:
A Digital Timing Mismatch Calibration Technique in Time-Interleaved ADCs. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 486-490 (2014) - [c2]Ling Du, Shuangyi Wu, Min Jiang, Ning Ning, Qi Yu, Yang Liu:
A 10-bit 100MS/s subrange SAR ADC with time-domain quantization. ISCAS 2014: 301-304 - 2013
- [c1]Ling Du, Ning Ning, Kejun Wu, Yang Liu, Qi Yu:
A process variation insensitive bandgap reference with self-calibration technique. ASICON 2013: 1-4
Coauthor Index
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last updated on 2024-10-07 21:16 CEST by the dblp team
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