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Neiel Leyva
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2020 – today
- 2023
- [c7]Max Doblas
, Gerard Candón, Xavier Carril, Marc Domínguez, Enric Erra, Alberto González
, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Josep Oltra, Julián Pavón, Cristóbal Ramírez
, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Hugo Safadi, Víctor Soria, Alejandro Suanes, Iván Vargas, Fernando Arreza, Roger Figueras, Pau Fontova-Musté, Joan Marimon, Ricardo Martínez, Sergio Moreno
, Jordi Sacristán, Oscar Alonso, Xavier Aragonès, Adrián Cristal, Ángel Diéguez, Manuel López, Diego Mateo, Francesc Moll, Miquel Moretó, Oscar Palomar, Marco A. Ramírez, Francisco Serra-Graells
, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luis Villa:
Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology. DCIS 2023: 1-6 - [c6]Neiel Leyva
, Alireza Monemi
, Noelia Oliete-Escuín
, Guillem López-Paradís
, Xabier Abancens
, Jonathan Balkind
, Enrique Vallejo
, Miquel Moretó
, Lluc Alvarez
:
OpenPiton Optimizations Towards High Performance Manycores. NoCArc@MICRO 2023: 27-33 - 2022
- [j1]Neiel Leyva
, Alireza Monemi, Enrique Vallejo
:
SynFull-RTL: Evaluation Methodology for RTL NoC Designs. IEEE Des. Test 39(6): 58-69 (2022) - [c5]Guillem Cabo, Gerard Candón, Xavier Carril
, Max Doblas
, Marc Domínguez, Alberto González
, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez
, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria
, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova
, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán
, Francisco Serra-Graells
, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luís Villa:
DVINO: A RISC-V Vector Processor Implemented in 65nm Technology. DCIS 2022: 1-6 - [c4]Víctor Soria Pardos
, Max Doblas
, Guillem López-Paradís, Gerard Candón, Narcís Rodas, Xavier Carril
, Pau Fontova-Musté
, Neiel Leyva, Santiago Marco-Sola, Miquel Moretó:
Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI. DSD 2022: 254-261 - 2021
- [c3]Alireza Monemi, Iván Pérez, Neiel Leyva, Enrique Vallejo
, Ramón Beivide, Miquel Moretó:
PIugSMART: a pluggable open-source module to implement multihop bypass in networks-on-chip. NOCS 2021: 41-48 - 2020
- [c2]Jaume Abella
, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas
, Roger Figueras
, Alberto González
, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll
, Miquel Moretó, Julián Pavón, Cristóbal Ramírez
, Marco Antonio Ramírez
, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria
, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso
, Luis Villa:
An Academic RISC-V Silicon Implementation Based on Open-Source Components. DCIS 2020: 1-6
2010 – 2019
- 2019
- [c1]Neiel I. Leyva-Santes, Ivan Perez, César-Alejandro Hernández-Calderón, Enrique Vallejo
, Miquel Moretó
, Ramón Beivide, Marco Antonio Ramírez Salinas
, Luis A. Villa-Vargas
:
Lagarto I RISC-V Multi-core: Research Challenges to Build and Integrate a Network-on-Chip. ISUM 2019: 237-248
Coauthor Index
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last updated on 2024-05-08 20:58 CEST by the dblp team
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