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2010 – 2019
- 2014
[j7]Calliope-Louisa Sotiropoulou
, Liberis Voudouris, Christos Gentsos, Athanasios M. Demiris, Nikolaos Vassiliadis, Spiridon Nikolaidis:
Real-Time Machine Vision FPGA Implementation for Microfluidic Monitoring on Lab-on-Chips. IEEE Trans. Biomed. Circuits Syst. 8(2): 268-277 (2014)- 2012
- [c9]Calliope-Louisa Sotiropoulou, Liberis Voudouris, Christos Gentsos, Spiridon Nikolaidis, Nikolaos Vassiliadis, Athanasios M. Demiris, Spyros Blionas:
FPGA-based machine vision implementation for Lab-on-Chip flow detection. ISCAS 2012: 2047-2050 - 2010
- [c8]Christos Gentsos, Calliope-Louisa Sotiropoulou, Spiridon Nikolaidis, Nikolaos Vassiliadis:
Real-time canny edge detection parallel implementation for FPGAs. ICECS 2010: 499-502
2000 – 2009
- 2009
- [j6]George Theodoridis, Nikolaos Vassiliadis, Spiridon Nikolaidis:
An integer linear programming model for mapping applications on hybrid systems. IET Comput. Digit. Tech. 3(1): 33-42 (2009) - [j5]Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis:
An Application Development Framework for ARISE Reconfigurable Processors. ACM Trans. Reconfigurable Technol. Syst. 2(4): 24:1-24:30 (2009) - [j4]Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis:
The ARISE Approach for Extending Embedded Processors With Arbitrary Hardware Accelerators. IEEE Trans. Very Large Scale Integr. Syst. 17(2): 221-233 (2009) - 2008
- [c7]Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis:
ARISE Machines: Extending Processors with Hybrid Accelerators. ARC 2008: 195-206 - 2007
- [c6]Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis:
The ARISE Reconfigurable Instruction Set Extensions Framework. ICSAMOS 2007: 153-160 - 2006
- [c5]Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis:
Enhancing a Reconfigurable Instruction Set Processor with Partial Predication and Virtual Opcode Support. ARC 2006: 217-229 - [c4]Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis:
An automated development framework for a RISC processor with reconfigurable instruction set extensions. IPDPS 2006 - 2005
- [j3]Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Dimitrios Soudris, Antonios Thanailakis, Spiridon Nikolaidis, Stilianos Siskos:
A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications. IEICE Trans. Inf. Syst. 88-D(7): 1369-1380 (2005) - [j2]Nikolaos Vassiliadis, A. Chormoviti, Nikolaos Kavvadias, Spiridon Nikolaidis:
The effect of Data-Reuse Transformations on Multimedia Applications for Application Specific Processors. Int. J. Comput. 4(3): 102-109 (2005) - [j1]Vasilios Kalenteridis, Haroula Pournara, Kostas Siozios, Konstantinos Tatas, Nikolaos Vassiliadis, Ilias Pappas, George Koutroumpezis, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris:
A complete platform and toolset for system implementation on fine-grain reconfigurable hardware. Microprocess. Microsystems 29(6): 247-259 (2005) - [c3]Dimitrios Soudris, Spiridon Nikolaidis, Stilianos Siskos, Konstantinos Tatas, Kostas Siozios, George Koutroumpezis, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Adonios Thanailakis:
AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow. ASP-DAC 2005: 3-4 - 2004
- [c2]Nikolaos Vassiliadis, A. Chormoviti, Nikolaos Kavvadias, Spiridon Nikolaidis:
The Effect of Data-Reuse Transformations on Multimedia Applications for Different Processing Platforms. PATMOS 2004: 593-602 - 2003
- [c1]Konstantinos Tatas, Kostas Siozios, Nikolaos Vassiliadis, D. J. Soudris, Spiridon Nikolaidis, Stilianos Siskos, Adonios Thanailakis:
FPGA Architecture Design and Toolset for Logic Implementation. PATMOS 2003: 607-616
Coauthor Index
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