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William Tatinian
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2020 – today
- 2023
- [c11]Ruochen Ding, William Tatinian:
Design and modeling of heterogeneous semi-active wake-up radio for sensor network applications. NEWCAS 2023: 1-4 - 2022
- [c10]Ruochen Ding, William Tatinian:
Hierarchical Modeling of 868MHz Wake-up Radio in OMNeT++. DCIS 2022: 1-6
2010 – 2019
- 2012
- [j4]Yannick Vaiarello, William Tatinian, Yves Leduc, Nicolas Veau, Gilles Jacquemod:
Ultra-Low-Power Audio Communication System for Cochlear Implant Application. J. Low Power Electron. 8(5): 706-716 (2012) - [c9]Olivier Berder, Olivier Sentieys, Trong Nhan Le, R. Fontaine, Alain Pegatoquet, Cécile Belleudy, Michel Auguin, William Tatinian, Gilles Jacquemod, Florian Broekaert, Amine Didioui, Carolynn Bernier, Karim Ben Chehida, Sylvain Bourdel, Hervé Barthélemy, P. Ciais, Chris Barratt:
GRECO: GREen communicating objects. DASIP 2012: 1-2 - 2011
- [j3]Yannick Vaiarello, William Tatinian, Yves Leduc, Nicolas Veau, Gilles Jacquemod:
Ultra-Low-Power Radio Microphone for Cochlear Implant Application. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(4): 622-630 (2011) - 2010
- [c8]Lucas Alves Da Silva, William Tatinian, Gilles Jacquemod:
BER and power consumption estimation based on hierarchical modeling of a 2.4 GHz power amplifier. BMAS 2010: 31-35 - [c7]William Tatinian, Yannick Vaiarello, Gilles Jacquemod:
Battery lifetime modelling for a 2.45GHz cochlear implant application. BMAS 2010: 48-52
2000 – 2009
- 2009
- [j2]Benjamin Nicolle, Rami Khouri, Fabien Ferrero, William Tatinian, Lorenzo Carpineto, Gilles Jacquemod:
On the use of behavioral modeling within the RFIC design flow: Satellite receiver case study. Microelectron. J. 40(12): 1726-1735 (2009) - [c6]Rami Khouri, Benjamin Nicolle, Lucas Alves Da Silva, William Tatinian, Gilles Jacquemod:
Evaluation of SystemC-AMS modeling capabilities of RF front-end non-linearities: satellite receiver case study. FDL 2009: 1-4 - 2008
- [j1]Gilles Jacquemod, Lionel Geynet, Benjamin Nicolle, Emeric de Foucauld, William Tatinian, Pierre Vincent:
Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology. Microelectron. J. 39(9): 1130-1139 (2008) - [c5]Fahd Ben Abdeljelil, Benjamin Nicolle, William Tatinian, Lorenzo Carpineto, Jean Oudinot, Gilles Jacquemod:
Application of Bottom-Up Methodology to RTW VCO. ISVLSI 2008: 46-50 - 2007
- [c4]Benjamin Nicolle, Mourad Zaarour, William Tatinian, Gilles Jacquemod:
System-Design-Oriented Low Noise Amplifier Modeling. ICECS 2007: 1332-1335 - 2006
- [c3]Benjamin Nicolle, William Tatinian, Jean Oudinot, Gilles Jacquemod:
Scalable Model for Multi-Standard Phase Locked Loop. ICECS 2006: 1352-1355 - [c2]Benjamin Nicolle, William Tatinian, Jean Oudinot, Gilles Jacquemod:
Hierarchical Modeling of a Fractional Phase Locked Loop. PATMOS 2006: 450-457 - 2005
- [c1]Benjamin Nicolle, Lionel Geynet, Emeric de Foucauld, William Tatinian, Gilles Jacquemod:
VHDL-AMS modeling of a multi-standard phase locked loop. ICECS 2005: 1-4
Coauthor Index
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