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2010 – 2019
- 2019
[c9]Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary:
Analog/Mixed-Signal Design Challenges in 7-nm CMOS and Beyond. CICC 2019: 1-8- 2018
- [c8]Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary:
Analog/mixed-signal design challenges in 7-nm CMOS and beyond. CICC 2018: 1-8
2000 – 2009
- 2009
- [c7]Amirali Shayan Arani, Xiang Hu, He Peng, Wenjian Yu, Wanping Zhang, Chung-Kuan Cheng, Mikhail Popovich, Xiaoming Chen, Lew Chua-Eoan, Xiaohua Kong:
Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network. ISQED 2009: 576-581 - 2006
- [j2]Xiaohua Kong, Radu Negulescu:
Semihiding operators and active-edge specification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9): 1831-1846 (2006) - 2004
- [c6]Xiaohua Kong, Radu Negulescu:
Bolstering Faith in GasP Circuits through Formal Verification. ASYNC 2004: 113-124 - [c5]Nisrine Saadallah, Xiaohua Kong, Radu Negulescu:
High-Speed Reduced Stack Dual Lock Circuits. ASYNC 2004: 219-228 - 2003
- [j1]Xiaohua Kong, Radu Negulescu, Larry Weidong Ying:
Refinement-based formal verification with heterogeneous timing. Int. J. Softw. Tools Technol. Transf. 4(3): 359-370 (2003) - 2001
- [c4]Radu Negulescu, Xiaohua Kong:
Semi-Hiding Operators and the Analysis of Active-Edge Specifications for Digital Circuits. ACSD 2001: 189- - [c3]Xiaohua Kong, Radu Negulescu:
Formal verification of pulse-mode asynchronous circuits. ASP-DAC 2001: 347-352 - [c2]Xiaohua Kong, Radu Negulescu, Larry Weidong Ying:
Refinement-Based Formal Verification of Asynchronous Wrappers for Independently Clocked Domains in Systems on Chip. CHARME 2001: 370-385 - [c1]Xiaohua Kong, Radu Negulescu:
Formal Verification of Peephole Optimizations in Asynchronous Circuits. FORTE 2001: 219-234
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